Integrated Color Space / Raster-To-Block Converter
Memory Interface (Load Capacitance CL = 50 pF)
Symbol
Parameter
tCSS
tCSH
tRADS
tRADH
tDTD
tDTH
tWRDS
tWRDH
tWADS
tWADH
Chip Select Setup Time
Chip Select Hold Time
Read Address Setup TIme
Read Address Hold Time
Read/Write Pulse Width
Read Data Output Delay Time
Read Data Output Hold Time
Write Data Setup Time
Write Address Setup Time
Write Address Hold Time
Min
Typ
Max
Units
0
ns
0
ns
7
ns
0
ns
20
ns
17
ns
2
ns
7
ns
0
ns
5
ns
SYSCLK
MOE
MWE
Memory Write
MWE
MADD
MDATA
Memory Read
MOE
MADD
MDATA
tMOE
X
Y
tMWE
tMWAS
tMWDD
tMWAH
tMWDH
tMRAD
tMRAH
tMRDS
tMRDH
Figure 40. Memory Interface Timing
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