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W83176G-733

Dual Bank DDR BUFFER For VIA CHIPSET

Winbond 

W83176R-733/W83176G-733

DUAL BANK DDR BUFFER FOR VIA CHIPSET

1. GENERAL DESCRIPTION

The W83176R-733 is a 2.5V Dual Bank D.D.R. Clock buffer designed for VIA system. W83176R-733

can support 4 D.D.R. DRAM DIMMs.

The W83176R-733 provides I2C serial bus interface to program the registers to enable or disable each

clock outputs. The W83176R-733 accepts a reference clock as its input and runs on 2.5V supply.

2. PRODUCT FEATURES

• Low Skew outputs (< 100ps)

• Two Feedback pins for synchronous for each bank.

• Supports up to 4 D.D.R. DIMMs

• Supports PC3200 D.D.R. SDRAM

• I2C 2-Wire serial interface and supports Byte or Block Date RW

• 48-pin SSOP package

3. PIN CONFIGURATION

VD D2.5 1

GND 2

FB _OU TB 3

B UF_ IN B 4

DD RBT0 5

DD RBC0 6

DD RBT1 7

DD RBC1 8

GND 9

VD D2.5 10

D DR AT0 11

D DR AC 0 12

D DR AT1 13

D DR AC 1 14

G ND 15

VD D2.5 16

FB _O UTA 17

BU F_INA 18

D DR AT2 19

D DR AC 2 20

D DR AT3 21

D DR AC 3 22

VD D2.5 23

G ND 24

48 V DD2 .5

47 G ND

46 O E_O DD*

45 O E_EVEN *

44 D DR BT2

43 D DR BC 2

42 D DR BT3

41 D DR BC 3

40 G ND

39 V DD2 .5

38 D DR AT4

37 D DR AC 4

36 D DR AT5

35 D DR AC 5

34 G ND

33 V DD2 .5

32 D DR BT4

31 D DR BC 4

30 D DR BT5

29 D DR BC 5

28 V DD2 .5

27 G ND

26 S DATA *

25 S CLK *

*: Internal pull-up resistor 120K to VDD

Publication Release Date: March, 2006

-1-

Revision 1.0

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