W83195BG-341 Просмотр технического описания (PDF) - Winbond
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W83195BG-341 Datasheet PDF : 26 Pages
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W83195BR-341/W83195BG-341
CLOCK GEN. FOR VIA P4/KT SERIES CHIPSET
3. PIN CONFIGURATION
FS0*/REF0 1
GND 2
XIN 3
XOUT 4
VDDAGP 5
AGP0 6
SELP4_K7*/AGP1 7
AGP2 8
GND 9
FS1&/PCI_F 10
SELSD_DD&/PCI1 11
M ULTSEL*/PCI2 12
GND 13
PCI3 14
PCI4 15
VDDPCI 16
PCI5 17
PCI6 18
GND 19
FS3&/48M hz 20
FS2&/24_48M Hz 21
VDD48 22
VDD 23
GND 24
IREF 25
PD#*/RESET# 26
SCLK* 27
SDATA* 28
56 VTT_PW RGD#/REF1
55 VDDR
54 GND
53 CPUT/CPUOD_T
52 CPUC/CPUOD_C
51 VDDC
50 VDDI
49 CPUCS_C
48 CPUCS_T
47 GND
46 FBOUT
45 BUF_IN
44 DDRT0/SDRAM 0
43 DDRC0/SDRAM 1
42 DDRT1/SDRAM 2
41 DDRC1/SDRAM 3
40 VDDD
39 GND
38 DDRT2/SDRAM 4
37 DDRC2/SDRAM 5
36 DDRT3/SDRAM 6
35 DDRC3/SDRAM 7
34 VDDD
33 GND
32 DDRT4/SDRAM 8
31 DDRC4/SDRAM 9
30 DDRT5/SDRAM 10
29 DDRC5/SDRAM 11
#: Active low
*: Internal pull up resistor 120KΩ to VDD
&: Internal Pull-down resistor 120KΩ to GND
4. BLOCK DIAGRAM
B U F _IN
X IN
XOUT
VTT_PW RGD#
F S (0 :3 )
SELP4_K7*
SELSD_DD&
M ULTSEL*
PD#*
P C I_S T O P # *
CLK_STOP#*
SDATA*
SCLK*
PLL2
XTAL
OSC
PLL1
Spread
Spectrum
D ivider
VCOCLK
M /N/Ratio
ROM
D ivider
Latch
&POR
C o ntro l
L o g ic
& Config
R egister
I2C
Interface
FBOUT
6
DD RT(0:5)/
SD RA M (0,2,4,6,8,10)
D DRC(0:5)/
6 SD RA M (1,3,5,7,9,11)
48M H z
24_48M H z
2
REF 0:1
CPUT/CPU OD _T
CPUC/CPU OD _C
CPUCS_T
CPUCS_C
3
A GP (0:2)
PCI_F
6
PCI 1:6
RESET#
R re f
-2-
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