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W83194BR-648 Просмотр технического описания (PDF) - Winbond

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W83194BR-648 Datasheet PDF : 26 Pages
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W83194BR-648
5.3 I2C Control Interface
PIN
PIN NAME TYPE
DESCRIPTION
34
SDATA*
I/O Serial data of I2C 2-wire control interface, Internal 120Kpull-up.
35
SDCLK*
IN Serial clock of I2C 2-wire control interface, Internal 120Kpull-up.
5.4 Fixed Frequency Outputs
PIN
PIN NAME TYPE
DESCRIPTION
Deciding the reference current for the CPUCLK pairs. The pin
was connected to the precision resistor tied to ground to decide
38
IREF
IN the appropriate current. There are two modes to select different
current via power on trapping the Pin 26 (MULTISEL0). The table
is show as follows.
REF0
OUT 3.3V, 14.318 MHz reference clock output.
2
FS0&
INtd120k
Latched input for FS0 at initial power up for H/W selecting the
output frequency. Internal 120 Kpull- down.
REF1
OUT 3.3V, 14.318 MHz reference clock output.
3
FS1&
INtd120k
Latched input for FS1 at initial power up for H/W selecting the
output frequency, Internal 120 Kpull- down.
REF2
OUT 3.3V, 14.318 MHz reference clock output.
4
FS2&
INtd120k
Latched input for FS2 at initial power up for H/W selecting the
output frequency. Internal 120 Kpull- down.
24_48 MHz OUT 24 MHz or 48 MHz clock output selected by Register.
26
MULTISEL0*
INtp120k
MULTISEL0* at initial power up for H/W selecting the current
multiplier for CPU outputs. Internal 120 Kpull-up.
27
48 MHz
OUT 48 MHz output for USB.
5.5 Power Management Pins
PIN
PIN NAME TYPE
DESCRIPTION
PD#*
IN
Power Down pin, low active all clocks are stopped, internal
120Kpull up.
33
Power good input signal comes from ACPI with high active. This
VTT_PWGD
IN
3.3V input is level sensitive strobe used to determine FS [4:0] and
MULTISEL0 input are valid and is ready to sample. This pin is
high active.
45
CPU_STOP#*
IN
CPU clock stop control pin, This pin is low active. Internal 120K
pull-up.
12
PCI_STOP#*
IN
PCI clock stop control pin, This pin is low active. Internal 120K
pull-up.
-4-

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