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W83194BR-648

CLOCK GENERATOR FOR SIS P4 SERIES CHIPSET

Winbond 

W83194BR-648

8.3 Byte Write Protocol.................................................................................................................14

8.4 Byte Read Protocol ................................................................................................................14

9. SPECIFICATIONS .....................................................................................................................15

9.1 Absolute Maximum Ratings...................................................................................................15

9.2 General Operating Characteristics ........................................................................................15

9.3 Skew Group Timing Clock .....................................................................................................16

9.4 CPU 0.7V Electrical Characteristics ......................................................................................16

9.5 CPU 1.0V Electrical Characteristics ......................................................................................16

9.6 AGP Electrical Characteristics...............................................................................................17

9.7 PCI Electrical Characteristics.................................................................................................17

9.8 ZCLK Electrical Characteristics .............................................................................................17

9.9 SDRAM Electrical Characteristics .........................................................................................18

9.10 24M, 48M Electrical Characteristics ......................................................................................18

9.11 REF Electrical Characteristics ...............................................................................................18

10. POWER MANAGEMENT TIMING .............................................................................................19

10.1 CPU_STOP# Timing Diagram...............................................................................................19

10.2 PCI_STOP# Timing Diagram ................................................................................................19

11. ORDERING INFORMATION......................................................................................................20

12. HOW TO READ THE TOP MARKING .......................................................................................20

13. PACKAGE DRAWING AND DIMENSIONS ...............................................................................21

14. REVISION HISTORY .................................................................................................................22

- III -

Publication Release Date: April 13, 2005

Revision 1.1

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