W83194R Просмотр технического описания (PDF) - Winbond

Номер в каталоге

Компоненты Описание

Список матч

W83194R

166MHZ CLOCK FOR SIS CHIPSET

Winbond 

W83194R-630A

PRELIMINARY

8.2.2 Register 1 : CPU Clock Register (1 = Active, 0 = Inactive)

Bit @PowerUp Pin

Description

7

x

- Latched FS2#

6

1

- Reserved

5

1

- 0 = 0.5% down type spread, overrides Byte0-bit7.

1= Center type spread.

4

1

- Reserved

3

1

43 CPUCLK2 (Active / Inactive)

2

1

45 CPUCLK1 (Active / Inactive)

1

1

46 CPUCLK0 (Active / Inactive)

0

1

- Reserved

8.2.3 Register 2: PCI Clock Register (1 = Active, 0 = Inactive)

Bit @PowerUp Pin

Description

7

1

- Reserved

6

1

14 PCICLK6 (Active / Inactive)

5

1

13 PCICLK5 (Active / Inactive)

4

1

12 PCICLK4 (Active / Inactive)

3

1

11 PCICLK3 (Active / Inactive)

2

1

9 PCICLK2 (Active / Inactive)

1

1

8 PCICLK1 (Active / Inactive)

0

1

7 PCICLK0 (Active / Inactive)

8.2.4 Register 3: Control Register (1 = Active, 0 = Inactive)

Bit @PowerUp

7

1

6

x

5

1

4

1

3

1

2

1

1

1

0

1

Pin

Description

-

1 Pin25 24_48MHz = 24MHz

0 Pin25 24_48MHz = 48MHz

-

Latched FS0#

26

48MHz (Active / Inactive)

25

24-48MHz (Active / Inactive)

-

Reserved

-

Reserved

48

REF1 (Active / Inactive)

2

REF0X2 (Active / Inactive)

Publication Release Date: Nov. 1999

-8-

Revision 0.65

Share Link: