W83194R Просмотр технического описания (PDF) - Winbond

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W83194R

166MHZ CLOCK FOR SIS CHIPSET

Winbond 

W83194R-630A

3. BLOCK DIAGRAM

PLL2

¡Ò2

Xin

Xout

*FS(0:3) 4

*MODE

SEL3.3_2.5#

CPU_STOP#

PCI_STOP#

PD#

*SDATA

*SCLK

XTAL

OSC

PLL1

Spread

Spectrum

STOP

CPU_STOP#

LATCH

5

POR

PCI

clock STOP

Divder

Control

Logic

Config.

Reg.

PCI_STOP#

PRELIMINARY

48MHz

24_48MHz

REF(0:1)

2

CPUCLK(0:2)

3

SDRAM(0:13)

14

PCICLK(0:6)

7

4. PIN CONFIGURATION

Vdd

1

REF0X2/ *FS3

2

Vss

3

Xin

4

Xout

5

VddP

6

PCICLK_F/ *FS1

7

PCICLK1/ *FS2

8

PCICLK2/*MODE

9

Vss

10

PCICLK3

11

PCICLK4

12

PCICLK5

13

PCICLK6

14

VddP

15

Vss

16

SDRAM 0/CPU_STOP#

17

SDRAM 1/PCI_STOP#

18

VddSD

19

SDRAM 2/PD#

20

SDRAM 3

21

Vss

22

*SDATA

23

*SDCLK

24

48

REF1

47

VddLCPU

46

CPUCLK_F

45

CPUCLK0

44

Vss

43

CPUCLK1

42

VddSD

41

SDRAM12

40

SDRAM_F

39

Vss

38

SDRAM11

37

SDRAM 10

36

VddSD

35

SDRAM 9

34

SDRAM 8

33

Vss

32

SDRAM 7

31

SDRAM 6

30

VddSD

29

SDRAM 5

28

SDRAM 4

27

VddSD

26

48MHz/*FS0

25

24_48MHz/SEL2.5_3.3#

Publication Release Date: Nov. 1999

-2-

Revision 0.65

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