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IDT723613L30PQF Просмотр технического описания (PDF) - Integrated Device Technology

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IDT723613L30PQF
IDT
Integrated Device Technology IDT
IDT723613L30PQF Datasheet PDF : 29 Pages
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IDT723613 CMOS CLOCKED FIFO WITH BUS MATCHING AND BYTE SWAPPING
64 x 36
COMMERCIAL TEMPERATURE RANGES
CLKB
EF
HIGH
CSB
W/RB
ENB
SW1,
SW0
tSZS
BE
tSZS
SIZ1,
SIZ0
(0,1)
PGB,
ODD/
EVEN
Little
Endian (2)
B0-B17
Big
Endian(2)
B18-B35
tENS
tSWS
tENH
tSWH
tSZH
tSZH
NOT (1,1)(1)
tPGS
(0,1)
tPGH
tEN
tA
Previous Data
tA
Previous Data
NOT (1,1)(1)
tA
Read 1
tA
Read 1
NOTES;
1. SIZ0 = HIGH and SIZ1 = HIGH selects the mail1 register for output on B0-B35.
2. Unused word B0-B17 or B18-B35 holds last FIFO1 output register data for word-size reads.
No Operation
tDIS
Read 2
tDIS
Read 2
3145 drw 07
DATA SWAP TABLE FOR FIFO WORD READS
FIFO DATA WRITE
A35-A27 A26-A18 A17-A9
A
B
C
A
B
C
A
B
C
A
B
C
A8-A0
D
D
D
D
SWAP MODE
SW1 SW0
L
L
READ
NO.
1
2
1
L
H
2
1
H
L
2
1
H
H
2
FIFO DATA READ
BIG ENDIAN
B35-B27 B26-B18
A
B
C
D
LITTLE ENDIAN
B17-B9
C
A
B8-B0
D
B
D
C
B
A
B
A
D
C
C
D
A
B
A
B
C
D
B
A
D
C
D
C
B
A
Figure 7. FIFO Word Read-Cycle Timing
18

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