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IDT723613L30PF

CMOS Clocked FIFO With Bus Matching and Byte Swapping 64 x 36

Integrated Device Technology 

IDT723613 CMOS CLOCKED FIFO WITH BUS MATCHING AND BYTE SWAPPING

64 x 36

CLKA

CLKB

RST

FS1,FS0

FF

EF

AE

AF

MBF1,

MBF2

tRSTS

tRSF

tFSS

tWFF

tREF

tPAE

tPAF

COMMERCIAL TEMPERATURE RANGES

tRSTH

tFSH

0,1

tWFF

3145 drw 04

Figure 4. Device Reset Loading the X Register with the Value of Eight

CLKA

tCLKH

tCLK

tCLKL

FFA

CSA

W/RA

MBA

ENA

A0 - A35

(HIGH)

tENS

tENS

tENH

tENH

tENS

tENH

tENS

tENH

tDS

tDH

W1(1)

tENS

tENH

W2(1)

ODD/

EVEN

PEFA

NOTE:

1. Written to the FIFO.

tPDPE

Valid

tPDPE

Valid

Figure 5. FIFO Write Cycle Timing

tENS

tENH

No Operation

3145 drw 05

16

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