CS8405A-CZ(2002) Просмотр технического описания (PDF) - Cirrus Logic

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CS8405A-CZ
(Rev.:2002)

96 kHz Digital Audio Interface Transmitter

Cirrus Logic 

CS8405A

8. CONTROL PORT REGISTER BIT DEFINITIONS

8.1 Control 1 (1h)

7

6

5

4

3

2

1

0

VSET

0

MUTEAES

0

INT1

INT0

VSET - Transmitted Validity bit level

Default = ‘0’

0 - Indicates data is valid, linear PCM audio data

1 - Indicates data is invalid or not linear PCM audio data

MUTEAES - Mute control for the AES transmitter output

Default = ‘0’

0 - Not Muted

1 - Muted

INT1:INT0 - Interrupt output pin (INT) control

Default = ‘00’

00 - Active high; high output indicates interrupt condition has occurred

01 - Active low, low output indicates an interrupt condition has occurred

10 - Open drain, active low. Requires an external pull-up resistor on the INT pin.

11 - Reserved

TCBLD - Transmit Channel Status Block pin (TCBL) direction specifier

Default = ‘0’

0 - TCBL is an input

1 - TCBL is an output

0

TCBLD

DS469PP4

17

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