SAA7187 Просмотр технического описания (PDF) - Philips Electronics
Номер в каталоге
Компоненты Описание
Список матч
SAA7187 Datasheet PDF : 36 Pages
| |||
Philips Semiconductors
Digital video encoder (DENC2-SQ)
Preliminary specification
SAA7187
PINNING
SYMBOL
VSSD1
VP3(4)
VP3(5)
VP3(6)
VP3(7)
RCV1
RCV2
VSSD2
VP2(0)
VP2(1)
VP2(2)
VP2(3)
VP2(4)
VP2(5)
VP2(6)
VP2(7)
VDDD1
n.c.
VSSD3
VP1(7)
VP1(6)
VP1(5)
VP1(4)
VP1(3)
VP1(2)
VP1(1)
VP1(0)
VSSD4
RCM1
RCM2
KEY
OSD0
OSD1
OSD2
VSSD5
CDIR
VDDD2
PIN
DESCRIPTION
1 digital ground 1
2
3
Upper 4 bits of the Video Port VP3. If pin 68 (SEL_MPU) is HIGH, this is the data bus of the
parallel MPU interface. If it is LOW, there can be multiplexed UV lines (422) or the U signal
4
(444) of the Video input.
5
6 Raster Control 1 for Video port. Depending on the synchronization mode, this pin
receives/provides a VS/FS/FSEQ signal.
7 Raster Control 2 for Video port. Depending on the synchronization mode, this pin
receives/provides an HS/HREF/CBL signal.
8 digital ground 2
9
10
11
12
Video Port VP2. In 444 input mode, this is input for the V-signal.
13
14
15
16
17 digital supply voltage 1
18 reserved, do not connect
19 digital ground 3
20
21
22
23 Video Port VP1. This is an input for CCIR 656 compatible, multiplexed video data, or during
24 other input modes, this is the Y-signal.
25
26
27
28 digital ground 4
29 Raster Control Master 1. This pin provides a VS/FS/FSEQ signal.
30 Raster Control Master 2. This pin provides a programmable HS pulse.
31 Key signal for OSD. It is active HIGH.
32
33 On-Screen Display data. This is the index for the internal OSD look-up table.
34
35 digital ground 5
36 Clock direction. If the CDIR input is HIGH, the circuit receives a clock signal, otherwise LLC
and CREF are generated by the internal crystal oscillator.
37 digital supply voltage 2
1995 Sep 21
4
Share Link: 