Philips Semiconductors
Digital video encoder (DENC2-SQ)
Preliminary specification
SAA7187
FEATURES
• CMOS 5 V device
• Digital PAL/NTSC encoder
• System pixel frequency selectable for 12.27 MHz (60 Hz
fields) or 14.75 MHz (50 Hz fields)
• 24-bit wide YUV input port or
• 16-bit wide YUV input port or
• Input data format Cb, Y, Cr, etc. (CCIR 656)
• I2C-bus control port
• MPU parallel control port
• Encoder can be master or slave
• Programmable horizontal and vertical input
synchronization phase
• Programmable horizontal sync output phase
• OSD overlay with Look-Up Tables (LUTs) 8 × 3 bytes
• Line 21 Closed Caption encoder
• Cross-colour reduction
• DACs operating at twice oversampling with 10-bit
resolution
• Controlled rise/fall times of output syncs and blanking
• Down-mode of DACs
• CVBS and S-Video output simultaneously
• PLCC68 package.
GENERAL DESCRIPTION
The SAA7187 encodes digital YUV video data to an
NTSC, PAL CVBS or S-Video signal.
The circuit accepts differently formatted YUV data with 640
or 768 active pixels per line. It includes a sync/clock
generator and on-chip Digital-to-Analog Converters
(DACs).
The circuit is compatible to the DIG-TV2 chip family
(Square Pixel).
QUICK REFERENCE DATA
SYMBOL
VDDA
VDDD
IDDA
IDDD
Vi
Vo(p-p)
RL
ILE
DLE
Tamb
PARAMETER
MIN. TYP. MAX.
analog supply voltage
4.75 5.0
5.25
digital supply voltage
4.5
5.0
5.5
analog supply current
digital supply current
−
50
55
−
175
210
input signal voltage levels
analog output signal voltages Y, C and CVBS without load −
(peak-to-peak value)
load resistance
80
LF integral linearity error
−
LF differential linearity error
−
operating ambient temperature
0
TTL compatible
2
−
−
−
−
±2
−
±1
−
+70
UNIT
V
V
mA
mA
V
Ω
LSB
LSB
°C
ORDERING INFORMATION
TYPE NUMBER
NAME
SAA7187 PLCC68
PACKAGE
DESCRIPTION
plastic leaded chip carrier; 68 leads
VERSION
SOT188-2
1995 Sep 21
2