datasheetbank_Logo
Технический паспорт Поисковая и бесплатно техническое описание Скачать

RF2968 Просмотр технического описания (PDF) - RF Micro Devices

Номер в каталоге
Компоненты Описание
Список матч
RF2968
RFMD
RF Micro Devices RFMD
RF2968 Datasheet PDF : 20 Pages
First Prev 11 12 13 14 15 16 17 18 19 20
RF2968
Preliminary
Special Modes of Operation
Calibration
When the RF2968 is Reset (CLRB=0), all calibration values are cleared. Therefore, after the RF2968 is powered up
from the OFF state, it must be instructed to perform its self-calibration. Circuits requiring calibration include the RX vari-
able gain amplifier (VGA), TX and RX PLL’s, RX channel filter, RX data paths, and TX Gaussian filter.
Calibration instructions are sent from the baseband to the RF2968 via the serial port (addressing Registers 5 and 7) and
must be performed in the order shown in the table below. After a calibration instruction is sent, the baseband must delay
for the length of time indicated before sending the next calibration instruction; this allows time for the RF2968 circuits to
settle and execute the instruction. At initialization, BypassSM, PU_XTAL, PU_MULT, and TX_EN are set high and
remain so for the duration of the calibration. Register 7 is only addressed during initialization to set TX_EN and configure
the reference frequency and RF PLL frequency.
11
.
Calibration Steps
Initialization of PLL
Initialization of
Chip Control
Calibrate KO of TX and
RX IF PLL’s
Calibrate Gaussian TX
and RX VGA
Calibrate IF Filters
Calibrate RX Offsets
Return Chip Control to
State Machine
Bit Settings for Calibration Sequencea
Register 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
7
0 0 0 0 xb xb xb 1 0 xc xc xc xc xc xc xc
5
1000000011000000
Required Time (usec)
0d
2500
5
1000010011000000
1024
5
1000101011000101
5
1000000011100101
5
1000000011010100
5
0000000000000000
Total Calibration Time:
285
608
64
0
4481
Notes:
a) Shaded cells indicate no change from previous state.
b) Set according to reference frequency.
c) Set RF PLL frequency to a valid frequency (LO=2403 to 2481MHz).
d) Register 5 may be programmed immediately after Register 7.
Transmitter Test Mode:
During normal TX mode, the transmitter's IF PLL is opened for modulation of the current controlled oscillator (ICO) for a
short period of time (0.4 to 3ms). For development purposes, open-loop modulation may be performed for an indefinite
period of time by externally supplying the required ICO control voltage. This allows the ICO to maintain a locked condi-
tion.
Transmitter Test Mode utilizes the LPO pin, which is switched to the output of the internal loop filter of the transmitter’s IF
ICO when Set_Tx_PLL_LF_Ext (Register 7, Bit 15) is set high and the 3.2kHz/32kHz low power oscillator is not in use.
This pin may be used either to monitor the control voltage during a packet transmission or to externally supply the control
voltage for an extended or continuous transmission. When monitoring the ICO control voltage, the voltage on the LPO
pin will drift from its initial voltage as the transmission time increases, but should remain in the range of 0.7V to 0.9V.
When supplying the ICO control voltage, the voltage to be applied to the LPO pin should be equal to the initial voltage
measured when monitoring.
11-136
Rev A13 010912

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]