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PCD4440T

Analog voice scrambler/descrambler

Philips Electronics 

Philips Semiconductors

Analog voice scrambler/descrambler

Product specification

PCD4440T

6 PINNING INFORMATION

6.1 Pinning

handbook, halfpage

SCL 1

8 A0

SDA 2

7 OSCI

PCD4440T

VSS 3

6 VDD

IN 4

5 OUT

MGG728

Fig.2 Pin configuration.

6.2 Pin description

SYMBOL PIN TYPE

DESCRIPTION

SCL

1

I serial clock line (I2C-bus)

SDA

2

I serial data line (I2C-bus)

VSS

3

P negative Supply

IN

4

I signal input

OUT

5

O signal output

VDD

OSCI

6

P positive supply

7

I oscillator input

A0

8

I slave address input (I2C-bus)

7 FUNCTIONAL DESCRIPTION

To provide privacy for the end user of a cordless telephone

set, the radio-link audio signal must be scrambled. In the

microphone of the handset and the incoming telephone

line audio path of the base unit a scrambler circuit has to

be implemented. Consequently the audio signal to the

telephone line and to the earpiece must be descrambled.

Both functions can be fulfilled by the PCD4440T by simply

inserting it in the audio path.

7.1 Scrambling

The PCD4440Taccomplishes this task by first filtering the

incoming signal, limiting the bandwidth to 3500 Hz. Then

the signal is split into a high (> fs) and a low (< fs) frequency

band. Both frequency bands are inverted and added again

to provide a single output signal. Values for 9 split

frequencies fS can be controlled by a scramble code table

in the microcontroller. Control of these split frequencies is

accomplished via the serial two-wire I2C-bus. In addition to

the split frequencies (fs), a transparent mode and mute

instruction can be selected (see Table 1).

Figure 3 shows the signal path for both bands. The lower

band path (on the left side of the diagram) operates on

frequencies f ≤ fs (Split Frequency), the upper band path

(on the right side) on frequencies f ≥ fs.

The input signal contains frequencies from f1 up to f2.

In scrambling mode, the output signal is band limited from

fl (300 Hz) to fh (3500 Hz). In the left path, the input signal

is first limited to fs. The following modulator inverts the

lower band. fl is folded up to fs, fs down to fl. In general, an

input frequency fin is folded to fout = fs + fl − fin. Finally the

folded signal is band limited to fs again.

In the right path, the input signal is first limited to fh.

The following modulator inverts the upper band. fs is folded

up to fh, fh down to fs. In general, an input frequency fin is

folded to fout = fs + fh − fin. Finally, the folded signal is band

limited to fh again. In the last step, the bands are added

and buffered.

Because of the symmetry of the scrambling process,

descrambling is achieved by passing the signal through

another PCD4440T.

In the transparent mode, the input signal is band limited to

3500 Hz. Frequencies from 0 to 300 Hz are not filtered

out.

1996 Dec 20

5

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