MT8960AE Просмотр технического описания (PDF) - Mitel Networks

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MT8960AE

Integrated PCM Filter Codec

Mitel Networks 

ISO2-CMOS MT8960/61/62/63/64/65/66/67

C2i

Input

tEF

F1i

Input

90%

10%

DSTo

Output

tES

high

impedance

90%

50%

10%

tCR

tEH

tPZL

tPZH

8 CLOCK CYCLES

(See Note)

tCF

tES

tEH

tPZL

tPZH

tER

tES

tEH

high-Z

Note:

Figure 9b - Timing Diagram - Output Enable

In typical applications, F1i will remain low for 8 cycles of C2i. However, the device will function normally as long as tES and

tEH are met at each positive edge of C2i.

C2i

Input

90%AAAAAAAAAAAAAAAAAA

50%AAAAAAAAAAAAAAAA

10%AAAAAAAAAAAAAA

tCR

tCF

DSTo

Output

90% AAAAAAAAAAAAAAAAAAAAAA

50%

10%

AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA

tPLH

tOR

tPLH

tOF

DSTi, CSTi

Input

90% AAAAAAAAAAAAAAAAAA

50% AAAAAAAAAAAAAAA

10% AAAAAAAAAAAAAA

tIR

tIF

tIH

tISH

tISL

Figure 9c - Timing Diagram - Input/Output

6-35

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