4-Port LVDS and LVTTL-to-LVDS Repeaters
tial impedance. Minimize the number of vias to further
prevent impedance discontinuities.
Avoid the use of unbalanced cables, such as ribbon
cable. Balanced cables, such as twisted pair, offer
superior signal quality and tend to generate less EMI
due to canceling effects. Balanced cables tend to pick
up noise as common mode, which is rejected by the
LVDS receiver.
Termination
The MAX9169/MAX9170 LVDS outputs are specified for
a 100Ω load but can drive 90Ω to 132Ω to accommo-
date various types of interconnect. The termination
resistor at the driven receiver should match the differ-
ential characteristic impedance of the interconnect and
be located close to the receiver input. Use a ±1% sur-
face-mount termination resistor.
Board Layout
A four-layer PC board with separate layers for power,
ground, and LVDS signals is recommended. Keep
LVTTL/LVCMOS signals separated from the LVDS sig-
nals to prevent crosstalk to the LVDS lines.
MAX9169
50Ω
IN+
PULSE
GENERATOR
IN-
50Ω
Figure 2. MAX9169 Output Offset Voltage Test Circuit
Test Circuits and Timing Diagrams
OUT1+
50Ω
10pF
VOS
50Ω
OUT1-
10pF
OUT4+
50Ω
10pF
VOS
50Ω
OUT4-
10pF
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