HM5257165BTD-75 Просмотр технического описания (PDF) - Elpida Memory, Inc
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HM5257165BTD-75 Datasheet PDF : 62 Pages
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HM5257165B/HM5257805B/HM5257405B-75/A6
From PRECHARGE state, command operation
To [DESL], [NOP]: When these commands are executed, the SDRAM enters the IDLE state after tRP has
elapsed from the completion of precharge.
From IDLE state, command operation
To [DESL], [NOP], [PRE] or [PALL]: These commands result in no operation.
To [ACTV]: The bank specified by the address pins and the ROW address is activated.
To [REF], [SELF]: The SDRAM enters refresh mode (auto-refresh or self-refresh).
To [MRS]: The synchronous DRAM enters the mode register set cycle.
From ROW ACTIVE state, command operation
To [DESL], [NOP]: These commands result in no operation.
To [READ], [READ A]: A read operation starts. (However, an interval of tRCD is required.)
To [WRIT], [WRIT A]: A write operation starts. (However, an interval of tRCD is required.)
To [ACTV]: This command makes the other bank active. (However, an interval of tRRD is required.)
Attempting to make the currently active bank active results in an illegal command.
To [PRE], [PALL]: These commands set the SDRAM to precharge mode. (However, an interval of tRAS is
required.)
From READ state, command operation
To [DESL], [NOP]: These commands continue read operations until the burst operation is completed.
To [READ], [READ A]: Data output by the previous read command continues to be output. After CAS
latency, the data output resulting from the next command will start.
To [WRIT], [WRIT A]: These commands stop a burst read, and start a write cycle.
To [ACTV]: This command makes other banks bank active. (However, an interval of tRRD is required.)
Attempting to make the currently active bank active results in an illegal command.
To [PRE], [PALL]: These commands stop a burst read, and the SDRAM enters precharge mode.
Data Sheet E0081H10
17
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