HM5257165BTD-75 Просмотр технического описания (PDF) - Elpida Memory, Inc

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HM5257165BTD-75

512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword × 16-bit × 4-bank/16-Mword × 8-bit × 4-bank /32-Mword × 4-bit × 4-bank PC/133, PC/100 SDRAM

Elpida Memory, Inc 

Current state

Row active

Read

Read with auto-

precharge

HM5257165B/HM5257805B/HM5257405B-75/A6

CS RAS CAS WE Address Command

Operation

H×

×

×

×

DESL

NOP

L

H

H

H×

NOP

NOP

L H L H BA, CA, A10 READ/READ A Begin read

L H L L BA, CA, A10 WRIT/WRIT A Begin write

L

L

H H BA, RA

ACTV

Other bank active

ILLEGAL on same bank*3

LL

H L BA, A10

PRE, PALL

Precharge

L

L

L

H×

REF, SELF

ILLEGAL

L

L

L

L

MODE

MRS

ILLEGAL

H×

×

×

×

DESL

Continue burst to end

L

H

H

H×

NOP

Continue burst to end

L

H

L

H BA, CA, A10 READ/READ A Continue burst read to CAS

latency and New read

L H L L BA, CA, A10 WRIT/WRIT A Term burst read/start write

L

L

H H BA, RA

ACTV

Other bank active

ILLEGAL on same bank*3

LL

H L BA, A10

PRE, PALL

Term burst read and

Precharge

L

L

L

H×

REF, SELF

ILLEGAL

L

L

L

L

MODE

MRS

ILLEGAL

H×

×

×

×

DESL

Continue burst to end and

precharge

L

H

H

H×

NOP

Continue burst to end and

precharge

L

H

L

H

BA, CA, A10 READ/READ A ILLEGAL*4

L

H

L

L

BA, CA, A10 WRIT/WRIT A ILLEGAL*4

L

L

H H BA, RA

ACTV

Other bank active

ILLEGAL on same bank*3

LL

H L BA, A10

PRE, PALL

ILLEGAL*4

L

L

L

H×

REF, SELF

ILLEGAL

L

L

L

L

MODE

MRS

ILLEGAL

Data Sheet E0081H10

15

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