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PDM4M4110 Просмотр технического описания (PDF) - Paradigm Technology

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PDM4M4110
Paradigm-Technology
Paradigm Technology Paradigm-Technology
PDM4M4110 Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
PRELIMINARY
PDM4M4110
AC Electrical Characteristics (Vcc = 5V ± 10%, TA = 0°C to +70°C)
PDM4M4110SXXZ, PDM4M4110SXXM
-15 ns
-20 ns
-25 ns
-35 ns
Symbol Parameter
Min. Max. Min. Max. Min. Max. Min. Max. Unit
Read Cycle
tRC
Read Cycle Time
tAA
Address Access Time
tACS
tCLZ(1)
Chip Select Access Time
Chip Select to Output inLow-Z
tOE
tOLZ(1)
tCHZ(1)
tOHZ(1)
Output Enable to Output Valid
Output Enable to Output in Low-Z
Chip Deselect to Output in High-Z
Output Disable to Output in High-Z
tOH
tPU(1)
tPD(1)
Output Hold from Address Change
Chip Select to Power-Up Time
Chip Deselect to Power-Down Time
Write Cycle
15 — 20 — 25 — 35 —
ns
— 15 — 20 — 25 — 35
ns
— 15 — 20 — 25 — 35
ns
5—3—3—3—
ns
— 6 — 10 — 12 — 15
ns
0—0—0—0—
ns
— 10 — 12 — 14 — 16
ns
— 6 — 8 — 10 — 12
ns
3—3—3—3—
ns
0—0—0—0—
ns
— 15 — 20 — 25 — 35
ns
tWC
tCW
tAW
tAS(2)
tWP
tWR(2)
tWHZ(1)
tDW
tDH(2)
tOW(1)
Write Cycle Time
Chip Select to End of Write
Address Valid to End of Write
Address Setup Time
Write Pulse Width
Write Recovery Time
Write Enable to Output in High-Z
Data to Write Time Overlap
Data Hold from Write Time
Output Active from End of Write
15 — 20 — 25 — 35 —
ns
13 — 18 — 20 — 25 —
ns
13 — 18 — 20 — 25 —
ns
3—3
3—3—
ns
13 — 15 — 17 — 22 —
ns
0—0—0—0—
ns
— 8 — 8 — 13 — 15
ns
10 — 12 — 15 — 20 —
ns
0—0—0—0—
ns
2—2—2—2—
ns
NOTE 1. This parameter is determined by device characteristics but is not production tested.
2. tAS = 0 ns for CS controlled write cycles. tDH, tWR = 3 ns for CS controlled write cycles
8-70
Rev 2.3 - 1/15/96

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