PDM4M4110 Просмотр технического описания (PDF) - Paradigm Technology
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PDM4M4110 Datasheet PDF : 10 Pages
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PRELIMINARY
PDM4M4110
512K x 32 CMOS
1 Static RAM Module
Features
n High-density 2 megabyte Static RAM module
n Low profile 72-pin ZIP (Zig-zag In-line vertical
Package) or 72-pin SIMM (Single In-line Memory
Module)
n Fast access time: 15 ns (max.)
n Surface mounted plastic components on an epoxy
laminate (FR-4) substrate Single 5V (±10%) power
supply
n Multiple VSS pins and decoupling capacitors for
maximum noise immunity
n Inputs/outputs directly TTL compatible
Description
The PDM4M4110 is a 512K x 32 static RAM module
constructed on an epoxy laminate (FR-4) substrate
using four (4) 512K x 8 static RAMs in plastic SOJ
packages. Availability of four chip select lines pro-
vides byte access. The PDM4M4110 is available with
access times as fast as 15 ns with minimal power
consumption.
The PDM4M4110 is packaged in a 72-pin FR-4 ZIP
(Zig-zag In-line vertical Package) or a 72-pin SIMM
2 (Single In-line Memory Module). The ZIP configura-
tion allows 72 pins to be placed on a package 3.95"
long and 0.250" wide. At only 0.600" high, this low-
profile package is ideal for systems with minimum
3 board spacing. The SIMM configuration allows use of
edge mounted sockets to secure the module.
All inputs and outputs of the PDM4M4110 are TTL
4 compatible and operate from a single 5V supply. Mul-
tiple ground pins and on board decoupling capacitors
provide maximum immunity from noise.
Four identification pins (PD0, PD1, PD2, PD3) are pro-
5 vided for applications in which different density
versions of the module are used. In this way, the tar-
get system can read the respective levels of PD0, PD1,
PD2, PD3 to determine a 512K depth.
6
7
Functional Block Diagram
CS1 CS2 CS3 CS4
19
A18-A0
WE
OE
512K x 32
RAM
4
PD3-PD0
8
8
8
8
I/O31-I/O0
8
9
10
11
12
Rev 2.3 - 1/15/96
8-65
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