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LX5512ELQ Просмотр технического описания (PDF) - Microsemi Corporation

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LX5512ELQ
Microsemi
Microsemi Corporation Microsemi
LX5512ELQ Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
LX5512E
TM
®
InGaP HBT 2.4 – 2.5 GHz Power Amplifier
PRODUCTION DATA SHEET
ABSOLUTE MAXIMUM RATINGS
DC Supply Voltage, RF off ...............................................................................6V
Collector Current ........................................................................................400mA
Total Power Dissipation....................................................................................2W
RF Input Power............................................................................................. 5dBm
Operation Ambient Temperature ...................................................-40°C to +85°C
Storage Temperature....................................................................-65°C to +150°C
Peak Package Solder Reflow Temp (40 seconds maximum exposure) ......... 260°C (+0, -5)
Note: Exceeding these ratings could cause damage to the device. All voltages are with respect to
Ground. Currents are positive into, negative out of specified terminal.
THERMAL DATA
LQ Plastic MLPQ 16-Pin
THERMAL RESISTANCE-JUNCTION TO CASE, θJC
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
10°C/W
50°C/W
PACKAGE PIN OUT
VC3
RF OUT
RF OUT
DET PWR
13 14 15 16
12 *
1
11
2
10
3
9
4
87 65
N.C.
RF IN
RF IN
VB1
* Pad is GND
LQ PACKAGE
(Bottom View)
N.C. – No internal connection
RoHS / Pb-free 100% Matte Tin Lead Finish
Name
RF IN
VB1
VB2
VB3
VCC
RF OUT
VC1
VC2
VC3
DET_PWR
GND
FUNCTIONAL PIN DESCRIPTION
Description
RF input for the power amplifier. This pin is DC-shorted to GND but AC-coupled to the transistor base of the
first stage.
Bias current control voltage for the first stage.
Bias current control voltage for the second stage
Bias current control voltage for the third stage. The VB3 pin can be connected with the first and second stage
control voltage (VB1,VB2) into a single reference voltage (referred to as Vref) through an external resistor
bridge.
Supply voltage for the bias reference and control circuits. The VCC feed line should be terminated with a 10
nF bypass capacitor close to connector pin. This pin can be combined with VC1, VC2 and VC3 pins, resulting
in a single supply voltage (referred to as Vc).
RF output for the power amplifier. This pin is DC-decoupled from the transistor collector of the third stage..
Power supply for first stage amplifier. The VC1 feedline should be terminated with a 120pF bypass capacitor,
followed by a 10 Ohm resistor
Power supply for second stage amplifier. The VC2 feedline should be terminated with a 47 pF bypass
capacitor, followed by a 5 Ohm resistor
Power supply for the third stage amplifier. The VC3 feedline should be terminated with a 120 pF bypass
capacitor. This pin can be combined with VC1,VC2 and VCC pins, resulting in a single supply voltage (referred
to as Vc
Power detector output-coupled pin should be terminated with a 100 kOhm loading resistor
The center metal base of the MLP package provides both DC and RF ground as well as heat sink for the
power amplifier..
Copyright © 2003
Rev. 2.0c, 2005-08-18
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 2

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