LH51BV1000JY-70LL Просмотр технического описания (PDF) - Sharp Electronics

Номер в каталоге

Компоненты Описание

Список матч

LH51BV1000JY-70LL

CMOS 1M (128K × 8) Static Ram

Sharp Electronics 

CMOS 1M (128K × 8) Static RAM

LH51BV1000J

DATA RETENTION CHARACTERISTICS (TA = -25°C to +850°C)

PARAMETER

SYMBOL

CONDITIONS

MIN.

TYP.1 MAX. UNIT NOTES

Data retention

supply voltage

VCCDR

CE2 ≤ 0.2 V or

CE1 ≥ VCCDR - 0.2 V

2.0



3.6

V

2

Data retention

supply current

VCCDR = 3 V

TA = 25°C



ICCDR

CE2 ≤ 0.2 V or

CE1 ≥ VCCDR - 0.2 V

TA = 40°C



0.5

1.0

µA



3.0











50

µA

2

Chip enable

setup time

tCDR



0





ms



Chip enable

hold time

tR



NOTES:

1. Typical value at TA = 25°C

2. CE2 ≥ VCCDR - 0.2 V or CE2 ≤ 0.2 V

5





ms



PIN CAPACITANCE (TA = 25°C, f = 1 MHz)

PARAMETER

SYMBOL CONDITIONS MIN.

TYP.

MAX.

UNIT NOTE

Input capacitance

CIN

VIN = 0 V





8

pF

1

I/O capacitance

CI/O

VI/O = 0 V





10

pF

1

NOTE:

1. This parameter is sampled and not production tested.

5

Share Link: