KSZ8841-16 Просмотр технического описания (PDF) - Micrel

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KSZ8841-16

Single-Port Ethernet MAC Controller with Non-PCI Interface

Micrel 

Micrel, Inc.

KSZ8841-16/32 MQL/MVL/MBL

Pin Number Pin Name

15

SRDYN

Type

Opu

16

INTRN

Opd

17

LDEVN

Opd

18

RDN

Ipd

19

EECS

Opu

20

ARDY

Opd

21

CYCLEN

Ipd

22

NC

Opd

23

DGND

Gnd

24

VDDCO

P

25

VLBUSN

Ipd

26

EEEN

Ipd

27

P1LED3

Opd

28

EEDO

Opd

29

EESK

Opd

Pin Function

Synchronous Ready Not

Ready signal to interface with synchronous bus for both EISA-like and VLBus-like extend

accesses.

For VLBus-like mode, the falling edge of this signal indicates ready. This signal is

synchronous to the bus clock signal BCLK.

For burst mode (32-bit interface only), the KSZ8841M drives this pin low to signal wait

states.

Interrupt

Active Low signal to host CPU to indicate an interrupt status bit is set, this pin need an

external 4.7K pull-up resistor.

Local Device Not

Active Low output signal, asserted when AEN is Low and A15-A4 decode to the

KSZ8841M address programmed into the high byte of the base address register. LDEVN

is a combinational decode of the Address and AEN signal.

Read Strobe Not

Asynchronous read strobe, active Low.

EEPROM Chip Select

This signal is used to select an external EEPROM device.

Asynchronous Ready

ARDY may be used when interfacing asynchronous buses to extend bus access cycles. It

is asynchronous to the host CPU or bus clock. this pin need an external 4.7K pull-up

resistor.

Cycle Not

For VLBus-like mode cycle signal; this pin follows the addressing cycle to signal the

command cycle.

For burst mode (32-bit interface only), this pin stays High for read cycles and Low for write

cycles.

No Connect

Digital IO ground

1.2V digital core voltage output (internal 1.2V LDO power supply output), this 1.2V output

pin provides power to VDDC, VDDA and VDDAP pins. It is recommended this pin should

be connected to 3.3V power rail by a 100 ohm resistor for the internal LDO application

Note: Internally generated power voltage. Do not connect an external power supply to this

pin. This pin is used for connecting external filter (Ferrite bead and capacitors).

VLBus-like Mode

Pull-down or float: Bus interface is configured for synchronous mode.

Pull-up: Bus interface is configured for 8-bit or 16-bit asynchronous mode or EISA-like

burst mode.

EEPROM Enable

EEPROM is enabled and connected when this pin is pull-up.

EEPROM is disabled when this pin is pull-down or no connect.

Port 1 LED indicator

See the description in pins 3, 4, and 5.

EEPROM Data Out

This pin is connected to DI input of the serial EEPROM.

EEPROM Serial Clock

A 4µs (OBCR[1:0]=11 on-chip bus speed @ 25 MHz) or 800 ns (OBCR[1:0]=00 on-chip

bus speed @ 125 MHz) serial output clock cycle to load configuration data from the serial

EEPROM.

October 2007

13

M9999-102207-1.6

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