74HC404N Просмотр технического описания (PDF) - Philips Electronics

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74HC404N

5-Bit x 64-word FIFO register; 3-state

Philips Electronics 

Philips Semiconductors

5-Bit x 64-word FIFO register; 3-state

Shift-in operation; high-speed burst mode

Product specification

74HC/HCT7404

handbook, full pagewidth

SI INPUT

Dn INPUT

DIR OUTPUT

1/f max

tW

VM (1)

MGA662

(1) HC : VM = 50%; VI = GND to VCC.

HCT : VM = 1.3 V; VI = GND to 3 V.

Fig.12 Waveforms showing SI minimum pulse width and maximum pulse frequency, in high-speed shift-in burst

mode.

Note to Fig.12

In the high-speed mode, the burst-in rate is determined by the minimum shift-in HIGH and shift-in LOW specifications.

The DIR status flag is a don't care condition, and a shift-in pulse can be applied regardless of the flag. A SI pulse which

would overflow the storage capacity of the FIFO is ignored.

September 1993

17

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