IDT72V801(2014) Просмотр технического описания (PDF) - Integrated Device Technology

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IDT72V801
(Rev.:2014)

3.3 VOLT DUAL CMOS SyncFIFO™

Integrated Device Technology 

IDT72V801/72V8211/72V821/72V831/72V841/72V851 3.3V DUAL CMOS SyncFIFOTM

DUAL 256 x 9, DUAL 512 x 9, DUAL 1K x 9, DUAL 2K x 9, DUAL 4K x 9, DUAL 8K x 9

COMMERCIAL AND INDUSTRIAL

TEMPERATURE RANGES

AC ELECTRICAL CHARACTERISTICS(1)

(Commercial: VCC = 3.3V ± 0.3V, TA = 0°C to +70°C; Industrial: VCC = 3.3V± 0.3V, TA = -40°C to +85°C)

Commercial

Com’l & Ind’l

Commercial

IDT72V801L10

IDT72V811L10

IDT72V821L10

IDT72V831L10

IDT72V841L10

IDT72V851L10

IDT72V801L15

IDT72V811L15

IDT72V821L15

IDT72V831L15

IDT72V841L15

IDT72V851L15

IDT72V801L20

IDT72V811L20

IDT72V821L20

IDT72V831L20

IDT72V841L20

IDT72V851L20

Symbol

Parameter

Min.

Max.

Min.

Max.

Min. Max.

Unit

fS

tA

tCLK

tCLKH

tCLKL

tDS

tDH

tENS

tENH

tRS

tRSS

tRSR

tRSF

tOLZ

tOE

tOHZ

tWFF

tREF

tPAF

tPAE

tSKEW1

Clock Cycle Frequency

Data Access Time

Clock Cycle Time

Clock High Time

Clock Low Time

Data Set-up Time

Data Hold Time

Enable Set-up Time

Enable Hold Time

Reset Pulse Width(2)

Reset Set-up Time

Reset Recovery Time

Reset to Flag Time and Output Time

Output Enable to Output in Low-Z(3)

Output Enable to Output Valid

Output Enable to Output in High-Z(3)

Write Clock to Full Flag

Read Clock to Empty Flag

Write Clock to Programmable Almost-Full Flag

Read Clock to Programmable Almost-Empty Flag

Skew Time Between Read Clock and Write Clock

for Empty Flag and Full Flag

—

100

—

66.7

—

50

MHz

2

6.5

2

10

2

12

ns

10

—

15(1)

—

20

—

ns

4.5

—

6

—

8

—

ns

4.5

—

6

—

8

—

ns

3

—

4

—

5

—

ns

0.5

—

1

—

1

—

ns

3

—

4

—

5

—

ns

0.5

—

1

—

1

—

ns

10

—

15

—

20

—

ns

8

—

10

—

12

—

ns

8

—

10

—

12

—

ns

—

10

—

15

—

20

ns

0

—

0

—

0

—

ns

3

6

3

8

3

10

ns

3

6

3

8

3

10

ns

—

6.5

—

10

—

12

ns

—

6.5

—

10

—

12

ns

—

6.5

—

10

—

12

ns

—

6.5

—

10

—

12

ns

5

—

6

—

8

—

ns

tSKEW2

Skew Time Between Read Clock and Write Clock for

Programmable Almost-Empty Flag and Programmable

Almost-Full Flag

14

—

18

—

20

—

ns

NOTES:

1. Industrial temperature range product for the 15ns speed grade is available as a standard device.

2. Pulse widths less than minimum values are not allowed.

3. Values guaranteed by design, not currently tested.

AC TEST CONDITIONS

In Pulse Levels

Input Rise/Fall Times

Input Timing Reference Levels

Output Reference Levels

Output Load

GND to 3.0V

3ns

1.5V

1.5V

See Figure 1

5

D.U.T.

510Ω

3.3V

330Ω

30pF*

4093 drw 03

or equivalent circuit

Figure 1. Output Load

*Includes jig and scope capacitances.

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