H7P0601DL Просмотр технического описания (PDF) - Renesas Electronics

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H7P0601DL

Silicon P-Channel MOS FET High Speed Power Switching

Renesas Electronics 

H7P0601DL, H7P0601DS

Reverse Drain Current vs.

Source to Drain Voltage

−50

−40

−30

−10 V

−20

−10

−5 V

VGS = 0, 5 V

Pulse Test

0

−0.4 −0.8 −1.2 −1.6 −2.0

Source to Drain Voltage VSD (V)

Maximum Avalanche Energy vs.

Channel Temperature Drating

20

IAP = −12 A

16

VDD = −25 V

duty < 0.1 %

Rg > 50 Ω

12

8

4

0

25 50 75 100 125 150

Channel Temperature Tch (°C)

Vin

-15 V

Avalanche Test Circuit

V DS

Monitor

Rg

50 Ω

L

I AP

Monitor

D. U. T

VDD

Avalanche Waveform

EAR =

1

2

L • I AP2•

VDSS

VDSS - V DD

I AP

ID

V(BR)DSS

VDS

VDD

0

Rev.1.00, Aug.05.2003, page 7 of 10

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