GL811S Просмотр технического описания (PDF) - GENESYS LOGIC
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GL811S Datasheet PDF : 37 Pages
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GL811S USB2.0 to ATA/ATAPI Bridge Controller
Pin Name
DD0~15
HD_RST#
CS1_, CS0_
DA0~2
INTRQ
DMACK_
IORDY
DIOR_
DIOW_
DMARQ
ATA/ATAPI Interface
Pin# Type
Description
57,59,61,
2,7,11,13,
15,14,12,
8,6,1,60,
B
(pd)
IDE Data Bus
58,54
20
O Device Reset
37,41 O Chip Select #1,#0
45,46,42
47
48
49
51
O IDE Address #2,#1,#0
I
(pd)
IDE interrupt input
O IDE Acknowledge
I
(pu)
IDE Ready
O IDE read signal
52
O IDE write signal
53
I
(pd)
IDE request
Pin Name
GOPI 1
PIO 0
PIO 1
PIO 2
U_RX
U_TX
Miscellaneous Interface
Pin# Type
Description
62
B
(pu)
General Purpose IO #1
4
B
(pd)
Program IO #0
5
B Program IO #1 becomes SPIDI when SPI interface is enabled
(pd) (SPIDI : SPI Data Input)
3
B Program I/O #2 becomes SPIDO when SPI interface is enabled
(pd) (SPIDO : SPI Data Output)
43
B
(pu)
UART RXD
44
O UART TXD
Pin Name
5V_IN
DGND
DVDD
AGND
AGND1
AVDD3
Power / Ground
Pin# Type
39
P 5V input
10,23,34,55 P Digital GND
9,31,40,56 P Digital VDD
24
P Analog GND
28
P Analog GND #1
25
P Analog VDD #3
Description
©2007 Genesys Logic Inc. - All rights reserved.
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