GL811S Просмотр технического описания (PDF) - GENESYS LOGIC

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GL811S

USB2.0 to ATA / ATAPI Bridge Controller

GENESYS LOGIC 

GL811S USB2.0 to ATA/ATAPI Bridge Controller

15

DD7

16

NC

B 31 X_POWER P 47 INTRQ I 63 F_LED B

32

XO

B 48 DMACK_ O 64 H_LED B

3.3 Pin Descriptions

Table 3.3 – 48 Pin Descriptions

Pin Name

VREF

DM

DP

XO

XI

RESET#

TEST

USB Interface

Pin# Type

Description

21

A Reference Resistor

18

B HS D-

19

B HS D+

24

B Crystal output

25

I Crystal input

15

I External reset

(pu)

26

I Test mode Input

(pd)

Pin Name

DD0~15

HD_RST#

CS1_, CS0_

DA0~2

INTRQ

DMACK_

IORDY

DIOR_

DIOW_

DMARQ

Pin#

43,45,47,

2,5,8,10,1

2,11,9,6,4,

1,46,44,

41

13

27,31

33,34,32

35

36

37

38

39

40

Type

B

(pd)

O

O

O

I

(pd)

O

I

(pu)

O

O

I

(pd)

ATA/ATAPI Interface

Description

IDE Data Bus

Device Reset

Chip Select #1,#0

IDE Address #2,#1,#0

IDE interrupt input

IDE Acknowledge

IDE Ready

IDE read signal

IDE write signal

IDE request

©2007 Genesys Logic Inc. - All rights reserved.

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