DS1077LU-40 Просмотр технического описания (PDF) - Dallas Semiconductor -> Maxim Integrated
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DS1077LU-40 Datasheet PDF : 20 Pages
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TABLE 3
PDN0 PDN1
SHUTDOWN CONTROL
(BIT) (BIT)
0
0
None*
0
1
CTRL1
1
0
CTRL0
1
1
CTRL0 or CTRL1
*CTRL0 performs a power-down if SEL0 and EN0 are both 0. (See Table 1.)
DS1077L
Serial Data Input/Output (SDA) – Input/output pin for the 2-wire serial interface used for data transfer.
Serial Clock Input (SCL) – Input pin for the 2-wire serial interface used to synchronize data movement
on the serial interface.
REGISTER FUNCTIONS
The user-programmable registers can be programmed by the user to determine the mode of operation
(MUX), operating frequency (DIV) and bus settings (BUS). Details of how these registers are
programmed can be found in a later section; in this section the functions of the registers are described.
The register setting are nonvolatile, the values are stored automatically or as required in EEPROM when
the registers are programmed via the SDA and SCL pins.
MUX WORD
MSB
LSB MSB
LSB
Name
* PDN1 PDN0 SEL0 EN0 0M1 0M0 1M1 1M0 DIV1 - - - - - -
Default setting
0
0
0
1
1
0
0
0
0
0 xxxxxx
first data byte
second data byte
*This bit must be set to zero.
DIV1 (bit)
This bit allows the output of the prescaler P1 to be routed directly to the OUT1 pin (DIV1 = 1). The N
divider is bypassed so the programmed value of N is ignored. If DIV1 = 0 (default) the N divider
functions normally.
0M1, 0M0, 1M1, 1M0 (bits)
These bits set the prescalers P0 and P1, to divide by 1, 2, 4, or 8. (See Table 4.)
TABLE 4
0M1
0M0
0
0
0
1
1
0
1
1
*Default Condition
PRESCALER
P0 DIVISOR 1M1 1M0
“M”
1*
0
0
2
0
1
4
1
0
8
1
1
PRESCALER
P1 DIVISOR
“M”
1*
2
4
8
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