CY7C135-25JC Просмотр технического описания (PDF) - Cypress Semiconductor
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CY7C135-25JC
Cypress Semiconductor
CY7C135-25JC Datasheet PDF : 12 Pages
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CY7C135
CY7C1342
Selection Guide
7C135-15 7C135-20 7C135-25 7C135-35 7C135-55
7C1342-15 7C1342-20 7C1342-25 7C1342-35 7C1342-55 Unit
Maximum Access Time
15
20
25
35
55
ns
Maximum Operating Commercial
220
190
180
160
160
mA
Current
Maximum Standby
Commercial
60
50
40
30
30
mA
Current for ISB1
Pin Configurations
PLCC
Top View
A1L
A2L
A3L
A4L
A5L
A6L
A7L
A8L
A9L
I/O0L
I/O1L
I/O2L
I/O3L
7 6 5 4 3 2 1 52 51 50 49 48 47
8
46
9
45
10
44
11
43
12
42
13
7C135
41
14
40
15
39
16
38
17
37
18
36
19
35
20
34
21 22 23 24 25 26 27 28 29 30 31 32 33
OER
A0R
A1R
A2R
A3R
A4R
A5R
A6R
A7R
A8R
A9R
NC
I/O7R
PLCC
Top View
A1L
A2L
A3L
A4L
A5L
A6L
A7L
A8L
A9L
I/O0L
I/O1L
I/O2L
I/O3L
7 6 5 4 3 2 1 52 51 50 49 48 47
8
46
9
45
10
44
11
43
12
42
13
7C1342
41
14
40
15
39
16
38
17
37
18
36
19
35
20
34
21 22 23 24 25 26 27 28 29 30 31 32 33
OER
A0R
A1R
A2R
A3R
A4R
A5R
A6R
A7R
A8R
A9R
NC
I/O7R
Pin Definitions
Left Port
Right Port
Description
A0L–11L
CEL
OEL
R/WL
SEML
(CY7C1342 only)
A0R–11R
CER
OER
R/WR
SEMR
(CY7C1342 only)
Address Lines
Chip Enable
Output Enable
Read/Write Enable
Semaphore Enable. When asserted LOW, allows access to eight semaphores. The three
least significant bits of the address lines will determine which semaphore to write or read.
The I/O0 pin is used when writing to a semaphore. Semaphores are requested by writing
a 0 into the respective location.
Document #: 38-06038 Rev. *C
Page 2 of 12
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