CY7C1009-15VCT(1998) Просмотр технического описания (PDF) - Cypress Semiconductor

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CY7C1009-15VCT
(Rev.:1998)

128K x 8 Static RAM

Cypress Semiconductor 

Data Retention Waveform

VCC

CE

4.5V

tCDR

DATA RETENTION MODE

VDR > 2V

Switching Waveforms

Read Cycle No. 1[10, 11]

tRC

ADDRESS

DATA OUT

tAA

tOHA

PREVIOUS DATA VALID

Read Cycle No. 2 (OE Controlled)[11, 12]

CY7C109

CY7C1009

4.5V

tR

109-5

DATA VALID

109–6

ADDRESS

tRC

CE1

CE2

OE

DATA OUT

VCC

SUPPLY

CURRENT

tACE

tDOE

tLZOE

HIGH IMPEDANCE

tLZCE

tPU

50%

Notes:

10. Device is continuously selected. OE, CE1 = VIL, CE2 = VIH.

11. WE is HIGH for read cycle.

12. Address valid prior to or coincident with CE1 transition LOW and CE2 transition HIGH.

DATA VALID

tHZOE

tHZCE

HIGH

IMPEDANCE

tPD

50%

ICC

ISB

109–7

6

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