CS5521(2000) Просмотр технического описания (PDF) - Cirrus Logic
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CS5521 Datasheet PDF : 56 Pages
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CS5521/22/23/24/28
2.2.3 Command Register Quick Reference
D7(MSB) D6
D5
D4
D3
CB
CS2
CS1
CS0
R/W
D2
RSB2
D1
RSB1
D0
RSB0
BIT
D7
D6-D4
NAME
Command Bit, CB
Channel Select Bits,
CSB2-CSB0
D3
D2-D0
Read/Write, R/W
Register Select Bit,
RSB2-RSB0
VALUE
0
1
000
.
.
111
0
1
000
001
010
011
101
110
111
FUNCTION
Must be logic 0 for these commands.
See table below.
CS2-CS0 provide the address of one of the eight physical
channels. These bits are used to access the calibration regis-
ters associated with respective channels.
Note: These bits are ignored when reading the data register.
Write to selected register.
Read from selected register.
Reserved
Offset Register
Gain Register
Configuration Register
Channel Set-up Registers
- register is 48-bits long for CS5521/22
- register is 96-bits long for CS5523/24
- register is 192-bits long for CS5528
Reserved
Reserved
D7(MSB) D6
D5
D4
D3
CB
CSRP3 CSRP2 CSRP1 CSRP0
D2
CC2
D1
CC1
D0
CC0
BIT
D7
D6-D3
D2-D0
NAME
Command Bit, CB
Channel Pointer Bits,
CSRP3-CSRP0
Conversion/Calibration
Bits, CC2-CC0
VALUE
0
1
0000
.
.
.
1111
000
001
010
011
100
101
110
111
FUNCTION
See table above.
Must be logic 1 for these commands.
These bits are used as pointers to the Setups.
Note: The MC bit, must be logic 0 for these bits to take effect.
When MC = 1, these bits are ignored. The LP, MC, and RC
bits in the configuration register are ignored during calibra-
tion.
Normal Conversion
Self-Offset Calibration
Self-Gain Calibration
Reserved
Reserved
System-Offset Calibration
System-Gain Calibration
Reserved
Table 2. Command Register Quick Reference
DS317F2
19
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