3. TYPICAL CONNECTION DIAGRAM
CS5351
+5 V to 3.3 V
+5V +
1 μF
+
1 μF
0.01 μF
0.01 μF
*
5.1 Ω
0.01 μF
0.01 μF
+
1 μF
+5V to 2.5V
VA
VD
VL
+
47 μF
FILT+
0.01 μF
REFGND
Analog
Input
Buffer
(Figure 24)
AINL
VQ1
VQ3
VQ2
AINR
CS5351
A/D CONVERTER
OVFL
RST
I2S/LJ
M/S
HPF
M0
M1
MDIV
SDOUT
VL
10 kΩ
Power Down
and Mode
Settings
Audio Data
Processor
LRCK
SCLK
MCLK
Timing Logic
and Clock
GND
GND
* Resistor may only be used
if VD is derived from VA. If
used, do not drive any other
logic from VD
Figure 22. Typical Connection Diagram
DS565F2
15