CL-PS7111 Просмотр технического описания (PDF) - Cirrus Logic
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CL-PS7111 Datasheet PDF : 105 Pages
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CL-PS7111
Low-Power System-on-a-Chip
2.2.2
Pin
No.
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
77
78
107
108
Numeric Pin Listing (cont.)
Signal
PD[6]
PD[5]
PD[4]
Buffer
Reset and
Pin Test
Reset State
Pin
No.
I/O - strength 1
Low
80
I/O - strength 1
Low
81
I/O - strength 1
Low
82
VDD
Pad power
–
83
VSS
Pad power
–
84
PD[3]
I/O - strength 1
Low
85
PD[2]
I/O - strength 1
Low
86
PD[1]
I/O - strength 1
Low
87
PD[0]
I/O - strength 1
Low
88
PCMCLK
–
Input
89
VSS
Core power
–
90
PCMSYNC
I/O - strength 1
Low
91
PCMOUT
I/O - strength 1
Low
92
PCMIN
I/O - strength 1
Input
93
N/C
I/O - strength 1
Low
94
ADCIN
I/O - strength 1
Input
95
NADCCS
I/O - strength 1
High
96
VSS
Core power
–
97
VDD
Core power
–
98
VSS
Pad power
–
99
VDD
Pad power
–
100
DRIVE[1]
I/O - strength 3
High/Low
101
DRIVE[0]
I/O - strength 3
High/Low
102
ADCCLK
I/O - strength 1
Low
103
ADCOUT
I/O - strength 1
Low
104
ADCCLK
I/O - strength 1
Low
105
ADCOUT
I/O - strength 1
Low
106
VDD
Pad power
–
136
VSS
Pad power
–
137
Signal
FB[1]
VSS
FB[0]
COL[7]/
PTOUT
COL[6]
COL[5]
COL[4]
COL[3]
COL[2]
VDD
VSS
COL[1]
COL[0]
BUZ
D[31]
D[30]
D[29]
D[28]
VSS
A[27]/DRA[0]
D[27]
A[26]/DRA[1]
D[26]
A[25]/DRA[2]
D[25]
N/C
A[24]/DRA[3]
A[12]
D[12]
Buffer
Reset and
Pin Test
Reset State
I/O - strength 1
Input
Input
I/O - strength 1
Input
I/O - strength 1
High
I/O - strength 1
I/O - strength 0b
I/O - strength 1
I/O - strength 1
I/O - strength 1
Pad power
Pad power
I/O - strength 1
I/O - strength 1
I/O - strength 1
I/O - strength 1
I/O - strength 1
I/O - strength 1
I/O - strength 1
–
I/O - strength 2
I/O - strength 1
I/O - strength 2
I/O - strength 1
I/O - strength 1
I/O - strength 1
High
High
High
High
High
–
–
High
High
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
I/O - strength 1
Low
I/O - strength 1
Low
I/O - strength 1
Low
September 1997
PRELIMINARY DATA BOOK v2.0
13
PIN INFORMATION
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