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BL35P02 Просмотр технического описания (PDF) - Shanghai Belling Co., Ltd.

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BL35P02
BELLING
Shanghai Belling Co., Ltd. BELLING
BL35P02 Datasheet PDF : 27 Pages
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上海贝岭股份有限公司
Shanghai Belling Co., Ltd.
BL35P02 DATASHEET
Figure 6.6.1
FCAE and OUTC of MCR are programmed to control the carrier has remote code or not. Either FCAE or
OUTC is clear, the carrier prescaler will be reset to make the first remote code with the carrier full. The waves
of IROUT, FCAE and OUTC are shown as follows:
The carrier of IROUT is based on the system clock that is half of oscillator frequency. It is programmed in
eight different prescaler ratios by setting FC[2:0] of OTP’s OPTION that is shown as follows:
Prescaler Divide Ratio Oscillator The Carrier Frequency
FC[2:0]
of System Clock
Frequency
of IROUT
000
6
445KHz
37.91K
001
36
4MHz
55.56K
010
50
4MHz
40.00K
011
53
4MHz
37.74K
100
56
4MHz
35.71K
101
61
4MHz
32.78K
110
64
4MHz
31.25K
111
74
4MHz
27.03K
6.7 Interrupts
The BL35P02 MCU can be interrupted by different sources including two maskable hardware interrupts
Keyboard interrupt (KBI) and Timer Overflow interrupt (TMI) and one non-maskable software interrupt
Software interrupt(SWI). If the interrupt mask bit (I-bit) in the Condition Code Register (CCR) is set, all
maskable interrupts are disabled. Clearing the I-bit enables interrupts. The software interrupt (SWI) is an
executable instruction and a non-maskable interrupt: it is execute regardless of the state of the I-bit in the CCR.
If the I-bit is zero (interrupt enabled), SWI is executed after interrupts that were pending when the SWI was
fetched, but before interrupts generated after the SWI was fetched. The SWI interrupt service routine address is
specified by the contents of locations $1FFC and $1FFD
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