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BL35P02

8-bit OTP MCU

Shanghai Belling Co., Ltd. 

上海贝岭股份有限公司

Shanghai Belling Co., Ltd.

BL35P02 DATASHEET

6.4 I/O Ports

The MCU provides 14 Bi-directional I/O pins (PA7-PA0, PB7-PB2) and 1 input pin (PB0). The individual

bits in these ports are programmable as either inputs or outputs under software control by the Data Direction

Registers (DDRx). All port pins each has an associated 25K Ω pull-up resistor, which can be

connected/disconnected under software control. Each Port pin is controlled by the corresponding bits in a

Data Direction Register and a Data Register as shown in Figure 6.4.1,

Figure 6.4.1

The functions of the I/O pins are summarized as follows:

Read/Write DDRx

Function

The I/O pins is in input mode. Data is written into the output

Write

0 data latch

Write

Data is written into the output data latch and output to the

1 I/O pin.

Read

0 The state of the I/O pin is read.

Read

1 The I/O pin is in an output mode. The output data latch is read.

Port A is configured for use as keyboard interrupts when the KBIE bit is set in the Miscellaneous Control

Register (MCR). Individual keyboard interrupt port pins are also maskable by setting corresponding bits in the

Keyboard Interrupt Mask Register (KBIM). When the KBEx bit is set, the corresponding Port A pin will the

configured as an input pin, regardless of the DDR setting, and a 25KΩ pull-up resistor is connected to the pin.

See Section 6.7.1 for details on the keyboard interrupts.

When Port B is used input port, it has an associated 25K Ω pull-up resistor, which can be

connected/disconnected under software control. As Port B is used output port, it has not an associated 25 KΩ

pull-up resistor. PB2’s pull-up resistor is controlled by PBP2 of MCR, PB3’s pull-up resistor is controlled by

PBP3 of MCR. PB4~PB7’s pull-up resistors are controlled by PBP of MCR.

When OTP is programming, PB0 is used high voltage input, normally it is used input port that has no

pull-up resistor, and configured for use as a keyboard interrupt when the KBEB0 is set in DDRB. See Section

6.7.1 for details on the keyboard interrupts.

6.5 Timer

The BL35P02 timer block diagram is shown in Figure 6.5.1. The timer contains a single 8-bit software

programmable count-down counter with a 7-bit software selectable prescaler. The counter may be preset under

software control and decrements towards zero. When the counter decrements to zero, the timer interrupt flag

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