BL35P02 Просмотр технического описания (PDF) - Shanghai Belling Co., Ltd.

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BL35P02

8-bit OTP MCU

Shanghai Belling Co., Ltd. 

上海贝岭股份有限公司

Shanghai Belling Co., Ltd.

BL35P02 DATASHEET

as follows:

Interrupt

KBI

TMI

SWI

RESET

Vector Address

$1FF4:$1FF5

$1FF6:$1FF7

$1FFC:$1FFD

$1FFE:$1FFF

Priority

Lowest

Highest

6.8 Low Power Modes

The BL35p02 has two low-power modes. The WAIT and STOP instructions provide two modes that reduce

the power required for the MCU by stopping various internal clocks and/or the on-chip oscillator.

6.8.1 STOP Mode

Execution of the STOP instruction places the MCU in its power consumption mode. In the STOP mode the

internal oscillator is turned off, halting all internal processing.

When the CPU enters STOP mode the I-bit in the CCR is cleared automatically, All other registers and

memory contents remain unaltered. All input/output lines remain unchanged.

The MCU can be brought out of the STOP mode only by a KBI interrupt or an externally generated reset.

When exiting the STOP mode the internal oscillator will resume after a pre-defined number of internal

processor clock cycles, due to oscillator stabilization.

In STOP mode the current of BL35P02 is less than 1uA.

6.8.2 WAIT Mode

The WAIT instruction places the MCU in a low-power mode, but consumes more power than the STOP

mode, In the WAIT mode the internal processor clock is halted, suspending all processor and internal bus

activities. Other Internal clocks remain active, permitting interrupts to be generated from the Timer. The Timer

may be used to generate a periodic exit from the WAIT mode or in conjunction with the external Timer pin, on

the occurrence of external events. Execution of the WAIT instruction automatically clears the I-bit in the CCR,

so that the KBI interrupt, Timer interrupt or externally generated reset can “wake” the MCU. All other registers,

memory, and input/output lines remain in their previous states.

In WAIT mode the current of BL35P02 is less than 100uA @3V.

6.9 Control Registers Summary

A summary of all Control Registers is shown as follows:

Register Name Address R/W State on reset

PA

$00 R/W 0000 0000

PB

$01 R/W 0000 00-0

DDRA

$04 R/W 0000 0000

DDRB

$05 R/W 0000 00-0

TDR

$08 R/W uuuu uuuu

TCR

$09 R/W 01-- 0100

KBIM

$0B R/W 0000 0000

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