MX28F2100B Просмотр технического описания (PDF) - Macronix International
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MX28F2100B Datasheet PDF : 45 Pages
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MX28F2100B
AUTOMATIC PROGRAMMING
The MX28F2100B is byte/word programmable using
the Automatic Programming algorithm. The Automatic
Programming algorithm does not require the system to
time out or verify the data programmed. The typical
room temperature chip programming time of the
MX28F2100B is less than 5 seconds.
AUTOMATIC CHIP ERASE
The entire chip is bulk erased using 10 ms erase
pulses according to MXIC's High Reliability Chip Erase
algorithm. Typical erasure at room temperature is
accomplished in less than five seconds. The device
may also be erased using the Automatic Erase
algorithm. The Automatic Erase algorithm automati-
cally programs the entire array prior to electrical erase.
The timing and verification of electrical erase are
controlled internally.
AUTOMATIC BLOCK ERASE
The MX28F2100B is block(s) erasable using MXIC's
Auto Block Erase algorithm. Block erase modes allow
one of 5 blocks of the array to be erased in one erase
cycle. The Automatic Block Erase algorithm automati-
cally programs the specified block(s) prior to electrical
erase. The timing and verification of electrical erase
are controlled internal to the device.
AUTOMATIC PROGRAMMING ALGORITHM
MXIC's Automatic Programming algorithm requires
the user to only write a program set-up command and
a program command (program data and address). The
device automatically times the programming pulse
width, provides the program verify, and counts the
number of sequences. A status register scheme pro-
vides feedback to the user as to the status of the
programming operation.
AUTOMATIC ERASE ALGORITHM
MXIC's Automatic Erase algorithm requires the user to
only write an Erase Set-up command and an Erase
command. The device will automatically pre-program
and verify the entire array. Then the device automati-
cally times the erase pulse width, provides the erase
verify, and counts the number of sequences. A status
register provides feedback to the user as to the status
of the erase operation. It is noted that after an Erase
Set-up command, if the next command is not an Erase
command, then the state-machine will set both the
program status and Erase Status bits of the Status
Register to a "1", place the device into the read Status
Register state, and wait for another command.
Commands are written to the command register using
standard microprocessor write timings. Register con-
tents serve as inputs to an internal state-machine
which controls the erase and programming circuitry.
During write cycles, the command register internally
latches address and data needed for the programming
and erase operations. During a system write cycle,
addresses are latched on the falling edge, and data is
latched on the rising edge of WE .
MXIC's Flash technology combines years of EPROM
experience to produce the highest levels of quality, relia-
bility, and cost effectiveness. The MX28F2100B electri-
cally erases all bits within a sector or chip simultaneously
using Fowler-Nordheim tunneling. The array is pro-
grammed one byte/word at a time using the EPROM
programming mechanism of hot electron injection.
During a program cycle, the state-machine will control the
program sequences and command register will not re-
spond to any command set. During a Sector/Chip Erase
cycle, the command register will respond to Erase Sus-
pend command. After Erase Suspend completed, the
device stays at status register Read state. After the state
machine has completed its task, it will allow the command
register to respond to its full command set.
P/N: PM0382
REV. 1.5, MAR. 24, 1998
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