SMJ55161 Просмотр технического описания (PDF) - Austin Semiconductor

Номер в каталоге

Компоненты Описание

Список матч

SMJ55161

262144 BY 16-BIT MULTIPORT VIDEO RAM

Austin Semiconductor 

D Organization:

– DRAM: 262 144 by 16 Bits

– SAM: 256 by 16 Bits

D Dual-Port Accessibility – Simultaneous and

Asynchronous Access From the DRAM and

SAM Ports

D Data-Transfer Function From the DRAM to

the Serial-Data Register

D (4 × 4) × 4 Block-Write Feature for Fast

Area-Fill Operations; as Many as Four

Memory-Address Locations Written Per

Cycle From the 16-Bit On-Chip Color

Register

D Write-Per-Bit Feature for Selective Write to

Each RAM I/O; Two Write-Per-Bit Modes to

Simplify System Design

D Byte-Write Control (CASL, CASU) Provides

Flexibility

D Extended Data Output for Faster System

Cycle Time

D Enhanced Page-Mode Operation for Faster

Access

D CAS-Before-RAS (CBR) and

Hidden-Refresh Modes

D Long Refresh Period

Every 8 ms (Maximum)

D Up to 45-MHz Uninterrupted Serial-Data

Streams

D 256 Selectable Serial-Register Starting

Locations

D SE-Controlled Register-Status QSF

D Split-Register-Transfer Read for Simplified

Real-Time Register Load

D Performance Ranges:

SMJ55161

262144 BY 16-BIT

MULTIPORT VIDEO RAM

SGMS056D – MAY 1995 – REVISED OCTOBER 1997

HKC PACKAGE

( TOP VIEW )

VCC 1

TRG 2

VSS 3

SQ0 4

DQ0 5

SQ1 6

DQ1 7

VCC 8

SQ2 9

DQ2 10

SQ3 11

DQ3 12

VSS 13

SQ4 14

DQ4 15

SQ5 16

DQ5 17

VCC 18

SQ6 19

DQ6 20

SQ7 21

DQ7 22

VSS 23

CASL 24

WE 25

RAS 26

A8 27

A7 28

A6 29

A5 30

A4 31

VCC 32

64 SC

63 SE

62 VSS

61 SQ15

60 DQ15

59 SQ14

58 DQ14

57 VCC

56 SQ13

55 DQ13

54 SQ12

53 DQ12

52 VSS

51 SQ11

50 DQ11

49 SQ10

48 DQ10

47 VCC

46 SQ9

45 DQ9

44 SQ8

43 DQ8

42 VSS

41 DSF

40 NC / GND

39 CASU

38 QSF

37 A0

36 A1

35 A2

34 A3

33 VSS

D Programmable Split-Register Stop Point

D 3-State Serial Outputs Allow Easy

Multiplexing of Video-Data Streams

D All Inputs/Outputs and Clocks TTL

Compatible

D Compatible With JEDEC Standards

D Designed to Work With the Texas

Instruments Graphics Family

ACCESS TIME

ROW ENABLE

ta(R)

(MAX)

SMJ55161-75

SMJ55161-80

75 ns

80 ns

ACCESS TIME

SERIAL DATA

ta(SQ)

(MAX)

23 ns

25 ns

DRAM

CYCLE TIME

tc(W)

(MIN)

140 ns

150 ns

DRAM

PAGE MODE

tc(P)

(MIN)

48 ns

50 ns

SERIAL OPERATING CURRENT OPERATING CURRENT

CYCLE TIME SERIAL PORT STAND- SERIAL PORT AC-

tc(SC) BY

ICC1

TIVE ICC1A

(MIN)

(MAX)

(MAX)

24 ns

30 ns

165 mA

160 mA

210 mA

195 mA

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Copyright © 1997, Texas Instruments Incorporated

• POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443

1

Share Link: