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ADV7533 Просмотр технического описания (PDF) - Analog Devices

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ADV7533 Datasheet PDF : 12 Pages
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ADV7533
Pin No.
G7
E2, E4, G1
C6
B1
B2, B3, B5, B6, C7,
E1, E7, F1, F7
E5
E6
D2
D1
D6
D7
Mnemonic
A2VDD
DVDD
PVDD
V3P3
GND
SDA
SCL
DDCSDA
DDCSCL
CEC
CEC_CLK
Type1
P
P
P
P
P
Description
1.8 V Power Supply for MIPI/DPHY Input. Should be filtered and as quiet as possible.
1.8 V Power Supply for Digital and I/O Power Supply. Supply power to the digital logic
and I/Os. Should be filtered and as quiet as possible.
1.8 V Power Supply for the PLL. Should be filtered and as quiet as possible. This supply is
the most noise sensitive.
3.3 V programming pin for HDCP nonvolatile memory.
Ground for all domains.
C
Serial Port Data I/O. Serves as the serial port data I/O slave for register access. Supports
CMOS logic levels from 1.8 V to 3.3 V.
C
Serial Port Data Clock. Serves as the serial port data clock slave for register access.
Supports CMOS logic levels from 1.8 V to 3.3 V.
C
Serial Port Data I/O to Receiver. Serves as the master to the DDC bus. 5 V CMOS logic
level.
C
Serial Port Data Clock to Receiver. Serves as the master clock for the DDC bus. 5 V CMOS
logic level.
I/O CEC I/O. If unused, pin should be connected to ground.
I
CEC External Clock. Can be from 3 MHz to 100 MHz. Settings default to 12 MHz. If
unused, pin should be connected to ground.
1 I = input, O = output, P = power supply, C = control.
Rev. 0 | Page 10 of 12

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