ADP3162 Просмотр технического описания (PDF) - Analog Devices
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ADP3162 Datasheet PDF : 12 Pages
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ADP3162
5-BIT CODE
1k
4.7nF
ADP3162
1 VID3
2 VID2
3 VID1
4 VID0
5 VID25
6 COMP
7 FB
8 CT
VCC 16
REF 15
CS– 14
PWM1 13
PWM2 12
CS+ 11
PWRGD 10
GND 9
AD820
1.2V
+
1F
12V
100nF
VFB
Figure 1. Closed-Loop Output Voltage Accuracy Test Circuit
Table I. Output Voltage vs. VID Code
VID25
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
VID3
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
VID2
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
VID1
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
VID0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
VOUT(NOM)
1.050 V
1.075 V
1.100 V
1.125 V
1.150 V
1.175 V
1.200 V
1.225 V
1.250 V
1.275 V
1.300 V
1.325 V
1.350 V
1.375 V
1.400 V
1.425 V
1.450 V
1.475 V
1.500 V
1.525 V
1.550 V
1.575 V
1.600 V
1.625 V
1.650 V
1.675 V
1.700 V
1.725 V
1.750 V
1.775 V
1.800 V
1.825 V
THEORY OF OPERATION
The ADP3162 combines a current-mode, fixed frequency PWM
controller with antiphase logic outputs in a controller for a two-
phase synchronous buck power converter. Two-phase operation
is important for switching the high currents required by high
performance microprocessors. Handling the high current in a
single-phase converter would place difficult requirements on the
power components such as inductor wire size, MOSFET ON-
resistance and thermal dissipation. The ADP3162’s high side
current sensing topology ensures that the load currents are bal-
anced in each phase, such that neither phase has to carry more
than half of the power. An additional benefit of high side current
sensing over output current sensing is that the average current
through the sense resistor is reduced by the duty cycle of the
converter allowing the use of a lower power, lower cost resistor.
The outputs of the ADP3162 are logic drivers only and are
not intended to directly drive external power MOSFETs.
Instead, the ADP3162 should be paired with drivers such as
the ADP3412, ADP3413, or ADP3414.
The frequency of the ADP3162 is set by an external capacitor
connected to the CT pin. Each output phase of the ADP3162
operates at half of the frequency set by the CT pin. The error
amplifier and current sense comparator control the duty cycle of
the PWM outputs to maintain regulation. The maximum duty
cycle per phase is inherently limited to 50% because the PWM
outputs toggle in two-phase operation. While one phase is on,
the other phase is off. In no case can both outputs be high at the
same time.
Output Voltage Sensing
The output voltage is sensed at the FB pin allowing for remote
sensing. To maintain the accuracy of the remote sensing, the
GND pin should also be connected close to the load. A voltage
error amplifier (gm) amplifies the difference between the output
voltage and a programmable reference voltage. The reference
voltage is programmed between 1.05 V and 1.825 V by an internal
5-bit DAC, which reads the code at the voltage identification
(VID) pins. (Refer to Table I for the output voltage versus VID pin
code information.)
Active Voltage Positioning
The ADP3162 uses Analog Devices Optimal Positioning Tech-
nology (ADOPT), a unique supplemental regulation technique
that uses active voltage positioning and provides optimal com-
pensation for load transients. When implemented, ADOPT adjusts
the output voltage as a function of the load current, so that it is
always optimally positioned for a load transient. Standard (passive)
voltage positioning has poor dynamic performance, rendering
it ineffective under the stringent repetitive transient conditions
required by high performance processors. ADOPT, however,
provides optimal bandwidth for transient response that yields
optimal load transient response with the minimum number of
output capacitors.
Reference Output
A 3.0 V reference is available on the ADP3162. This reference
is normally used to set the voltage positioning accurately using a
resistor divider to the COMP pin. In addition, the reference can
be used for other functions such as generating a regulated voltage
with an external amplifier. The reference is bypassed with a 1 nF
capacitor to ground. It is not intended to supply current to large
capacitive loads, and it should not be used to provide more than
1 mA of output current.
REV. A
–5–
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