ADM2486BRW Просмотр технического описания (PDF) - Analog Devices
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ADM2486BRW Datasheet PDF : 20 Pages
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADM2486
Table 8.
Pin No.
1
2, 8
3
4
5
6
7
9, 15
10
11, 14
12
13
16
VDD1 1
16 VDD2
GND11 2 ADM2486 15 GND21
RxD 3 TOP VIEW 14 NC
RE 4 (Not to Scale) 13 B
RTS 5
12 A
TxD 6
11 NC
PV 74
GND11 8
150 DE
9 GND21
NC = NO CONNECT
1 PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED.
EITHER OR BOTH MAY BE USED FOR GND1.
PIN 9 AND PIN 15 ARE INTERNALLY CONNECTED.
EITHER OR BOTH MAY BE USED FOR GND2.
Figure 2. Pin Configuration
Mnemonic
VDD1
GND1
R×D
RE
RTS
TxD
PV
GND2
DE
NC
A
B
VDD2
Function
Power Supply (Logic Side).
Ground (Logic Side).
Receiver Output Data. This output is high when (A – B) > 200 mV, and low when (A – B) < –200 mV.
The output is three-stated when the receiver is disabled, that is, when RE is driven high.
Receiver Enable Input. This is an active-low input. Driving this input low enables the receiver, and driving
it high disables the receiver.
Request to Send Input. Driving this input high enables the driver, and driving it low disables the driver.
Transmit Data Input. Data to be transmitted by the driver is applied to this input.
Power_Valid. Used during power-up and power-down. See the Applications Information section.
Ground (Bus Side).
Driver Enable Status Output. This output signals the driver enable or disable status to other devices on
the bus. DE is high when the driver is enabled and low when the driver is disabled.
No Connect.
Noninverting Driver Output/Receiver Input. When the driver is disabled, or when VDD1 or VDD2 is powered
down, Pin A is put into a high impedance state to avoid overloading the bus.
Inverting Driver Output/Receiver Input. When the driver is disabled, or when VDD1 or VDD2 is powered
down, Pin B is put into a high impedance state to avoid overloading the bus.
Power Supply (Bus Side).
Rev. C | Page 9 of 20
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