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AD9645 Просмотр технического описания (PDF) - Analog Devices

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AD9645 Datasheet PDF : 36 Pages
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Data Sheet
AD9645
SPECIFICATIONS
DC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, 2 V p-p differential input, 1.0 V internal reference, AIN = −1.0 dBFS, unless otherwise noted.
Table 1.
Parameter1
RESOLUTION
ACCURACY
No Missing Codes
Offset Error
Offset Matching
Gain Error
Gain Matching
Differential Nonlinearity (DNL)
Integral Nonlinearity (INL)
TEMPERATURE DRIFT
Offset Error
INTERNAL VOLTAGE REFERENCE
Output Voltage (1 V Mode)
Load Regulation at 1.0 mA (VREF = 1 V)
Input Resistance
INPUT-REFERRED NOISE
VREF = 1.0 V
ANALOG INPUTS
Differential Input Voltage (VREF = 1 V)
Common-Mode Voltage
Common-Mode Range
Differential Input Resistance
Differential Input Capacitance
POWER SUPPLY
AVDD
DRVDD
IAVDD2
IDRVDD (ANSI-644 Mode)2
IDRVDD (Reduced Range Mode)2
TOTAL POWER CONSUMPTION
DC Input
Sine Wave Input (Two Channels; Includes Output Drivers in
ANSI-644 Mode)
Sine Wave Input (Two Channels; Includes Output Drivers in
Reduced Range Mode)
Power-Down
Standby3
Temp
AD9645-80
Min Typ Max
14
Full
Guaranteed
Full −0.6 −0.2 +0.1
Full −0.2 +0.1 +0.4
Full −4.3 −1.0 +2.2
Full
0.5 2.2
Full −0.6
+1.3
25°C
±0.65
Full −2.6
+2.8
25°C
±1.1
Full
2.7
Full 0.98 1.0 1.02
25°C
2
25°C
7.5
25°C
0.95
Full
2
Full
0.9
25°C 0.5
1.3
25°C
5.2
25°C
3.5
Full 1.7 1.8 1.9
Full 1.7 1.8 1.9
Full
56
61
Full
48
50
25°C
39
Full
178 191
Full
187 200
25°C
171
25°C
2
Full
92
101
AD9645-125
Min Typ Max Unit
14
Bits
Guaranteed
−0.6 −0.2 +0.2
−0.2 +0.1 +0.4
−5.1 −1.5 +2.3
0.6 2.6
−0.6
+1.3
±0.65
−3.6
+3.4
±1.5
% FSR
% FSR
% FSR
% FSR
LSB
LSB
LSB
LSB
3.3
ppm/°C
0.98 1.0
2
7.5
1.02 V
mV
1.0
LSB rms
2
V p-p
0.9
V
0.5
1.3
V
5.2
3.5
pF
1.7
1.8 1.9
V
1.7
1.8 1.9
V
78
83
mA
57
60
mA
48
mA
227 244 mW
243 257 mW
227
mW
2
mW
115 126 mW
1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for definitions and for details on how these tests were completed.
2 Measured with a low input frequency, full-scale sine wave on both channels.
3 Can be controlled via the SPI.
Rev. B | Page 3 of 36

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