AD8387 Просмотр технического описания (PDF) - Analog Devices

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AD8387

700 MHz to 2700 MHz Quadrature Modulator

Analog Devices 

THERMAL PAD DESIGN

To minimize thermal performance degradation of production

PCBs, the contact area between the thermal pad and the PCB

should be maximized. Therefore, the size of the thermal pad

on the top PCB layer should match the exposed paddle. The

second thermal pad of the same size should be placed on the

bottom side of the PCB. At least one thermal pad should be in

direct thermal contact with an external plane, such as AVCC

or GND.

THERMAL VIA STRUCTURE DESIGN

Effective heat transfer from the top to the inner and bottom

layers of the PCB requires thermal vias incorporated into the

thermal pad design. Thermal performance increases

logarithmically with the number of vias.

Near optimum thermal performance of production PCBs is

attained only when tightly spaced thermal vias are placed on

the full extent of the thermal pad.

Thermal Pad and Thermal via Connections

The thermal pad on the solder side is connected to a plane. The

use of thermal spokes is not recommended when connecting

the thermal pads or via structure to the plane.

Solder Masking

Solder masking of the via holes on the top layer of the PCB

plugs the via holes, inhibiting solder flow into the holes. To

minimize the formation of solder voids due to solder flowing

into the via holes (solder wicking), via diameter should be made

small, and an optional solder mask can be used. To optimize the

thermal pad coverage when using the solder mask, its diameter

should be no more than 0.1 mm larger than the via hole

diameter.

Pads are set by customer’s PCB design rules.

Thermal via Holes—Circular mask, centered on the via holes.

Diameter of the mask should be 0.1 mm larger than the via hole

diameter.

Solder Mask—Bottom Layer

This is set by customer’s PCB design rules.

AD8387 PCB DESIGN RECOMMENDATIONS

Table 5. Land Pattern Dimensions

Pad Size

Pad Pitch

0.6 mm × 0.25 mm

0.5 mm

Thermal Pad Size

6 mm × 6 mm

AD8387

16mm

6.5mm

Figure 18. Land Pattern—Top Layer

6.5mm

Figure 19. Land Pattern—Bottom Layer

Figure 20. Solder Mask—Top Layer

Thermal Via Structure

0.25 mm − 0.35 mm holes

0.5 mm − 1.0 mm grid

Rev. 0 | Page 15 of 16

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