AD73360AR Просмотр технического описания (PDF) - Analog Devices
Номер в каталоге
Компоненты Описание
Список матч
AD73360AR Datasheet PDF : 35 Pages
| |||
AD73360
Parameter
AD73360A
Min
Typ Max
Unit
Test Conditions/Comments
LOGIC INPUTS
VINH, Input High Voltage
VINL, Input Low Voltage
IIH, Input Current
CIN, Input Capacitance
LOGIC OUTPUTS
VOH, Output High Voltage
VOL, Output Low Voltage
Three-State Leakage Current
VDD – 0.8
0
VDD – 0.4
0
–10
VDD
V
0.8
V
10
µA
10
pF
VDD
V
0.4
V
+10 µA
|IOUT| ≤ 100 µA
|IOUT| ≤ 100 µA
POWER SUPPLIES
AVDD1, AVDD2
DVDD
IDD8
2.7
3.3
V
2.7
3.3
V
See Table I
NOTES
1Operating temperature range is as follows: –40°C to +85°C. Therefore, TMIN = –40°C and TMAX = +85°C.
2Test conditions: Input PGA set for 0 dB gain (unless otherwise noted).
3At input to sigma-delta modulator of ADC.
4Guaranteed by design.
5Overall group delay will be affected by the sample rate and the external digital filtering.
6The ADC’s input impedance is inversely proportional to DMCLK and is approximated by: (4 × 1011)/DMCLK.
7Frequency response of ADC measured with input at audio reference level (the input level that produces an output level of –10 dBm0), with 38 dB preamplifier
bypassed and input gain of 0 dB.
8Test Conditions: no load on digital inputs, analog inputs ac coupled to ground.
Specifications subject to change without notice.
Table I. Current Summary (AVDD = DVDD = 3.3 V)
Conditions
Analog
Current
Digital
Current
Total
Current
(Max)
SE
MCLK
ON
Comments
ADCs Only On
12
10
26.5
1
YES
REFOUT Disabled
REFCAP Only On 0.75
0.04
1.0
0
NO
REFOUT Disabled
REFCAP and
REFOUT Only On 3.3
0.04
4.5
0
NO
All Sections Off
0.01
1.2
1.5
0
YES
MCLK Active Levels Equal to 0 V and DVDD
All Sections Off
0.01
0.03
0.1
0
NO
Digital Inputs Static and Equal to 0 V or DVDD
The above values are in mA and are typical values unless otherwise noted. MCLK = 16.384 MHz; SCLK = 16.384 MHz.
REV. A
–3–
Share Link: 