datasheetbank_Logo
Технический паспорт Поисковая и бесплатно техническое описание Скачать

5962-9461201HMX Просмотр технического описания (PDF) - Aeroflex Corporation

Номер в каталоге
Компоненты Описание
Список матч
5962-9461201HMX
Aeroflex
Aeroflex Corporation Aeroflex
5962-9461201HMX Datasheet PDF : 20 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
General Description, Cont’d,
sealed co-fired ceramic 66 pin, 1.08"SQ PGA
or a 68 lead, .88"SQ Ceramic Gull Wing CQFP
package for operation over the temperature
range of -55°C to +125°C and military
environment.
Each flash memory die is organized as
512KX8 bits and is designed to be
programmed in-system with the standard
system 5.0V Vcc supply. A 12.0V VPP is not
required for write or erase operations. The
MCM can also be reprogrammed with standard
EPROM programmers (with the proper socket).
executing the erase command sequence. This
will invoke the Embedded Erase Algorithm
which is an internal algorithm that
automatically preprograms the array, (if it is not
already programmed) before executing the
erase operation. During erase, the device
automatically times the erase pulse widths and
verifies proper cell margin.
Each die in the module or any individual
sector of the die is typically erased and verified
in 1.5 seconds (if already completely
preprogrammed).
The standard ACT–F512K32 offers access
Each die also features a sector erase
times between 60ns and 150ns, allowing architecture. The sector mode allows for 64K
A
operation of high-speed microprocessors byte blocks of memory to be erased and
without wait states. To eliminate bus reprogrammed without affecting other blocks.
contention, the device has separate chip The ACT-F512K32 is erased when shipped
enable (CE) and write enable (WE). The from the factory.
ACT-F512K32 is command set compatible with
JEDEC standard 4 Mbit EEPROMs.
Commands are written to the command
register using standard microprocessor write
timings. Register contents serve as input to an
internal state-machine which controls the
erase and programming circuitry. Write cycles
also internally latch addresses and data
needed for the programming and erase
operations.
The device features single 5.0V power
supply operation for both read and write
functions. lnternally generated and regulated
voltages are provided for the program and
erase operations. A low VCC detector
automatically inhibits write operations on the
loss of power. The end of program or erase is
detected by Data Polling of D7 or by the Toggle
Bit feature on D6. Once the end of a program
or erase cycle has been completed, the device
Reading data out of the device is similar to internally resets to the read mode.
reading from 12.0V Flash or EPROM devices.
The ACT-F512K32 is programmed by
executing the program command sequence.
This will invoke the Embedded Program
Algorithm which is an internal algorithm that
automatically times the program pulse widths
and verifies proper cell margin. Typically, each
sector can be programmed and verified in less
All bits of each die, or all bits within a
sector of a die, are erased via
Fowler-Nordhiem tunneling. Bytes are
programmed one byte at a time by hot electron
injection.
DESC Standard Military Drawing (SMD)
numbers are released.
than one second. Erase is accomplished by
Aeroflex Circuit Technology
2
SCD1665 REV B 6/29/01 Plainview NY (516) 694-6700

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]