CS5542 Просмотр технического описания (PDF) - Cirrus Logic

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CS5542

22-Bit, Multi-Channel ∆Σ ADC Chip Set

Cirrus Logic 

CS5542 CS5543

DATAOUT [0] SIGN MSB

DATAOUT [1] SIGN MSB

DATAOUT [2] SIGN MSB

DATAOUT [3] SIGN MSB

channel 0

LSB OD Parity SIGN MSB

channel 1

LSB OD Parity SIGN MSB

channel 2

LSB OD Parity SIGN MSB

channel 3

LSB OD Parity SIGN MSB

Figure 5. Data Transfer Timing

channel 4

LSB OD Parity

channel 5

LSB OD Parity

channel 6

LSB OD Parity

channel 7

LSB OD Parity

written with two read cycles using different com-

mands to read either the MSW (Most Significant

Word) or the LSW (Least Significant Word).

When reading or writing to the calibration regis-

ters, the register contents are time-division multi-

plexed into or out of the CS5543 in the same

manner as conversion data as shown in Figure 5.

In addition to writing or reading the calibration reg-

isters, the CS5543 provides several test modes.

Some of these test modes are as follows: The

DATAOUT [3:0] pins can be set to a high imped-

ance output state; or either of two different test pat-

terns can be requested to be output on the

DATAOUT [3:0] pins of the CS5543. See Table 4

for the test pattern information.

Commands to change calibration modes or control

modes should not be issued to the system while a

calibration is in progress. New data for the calibra-

tion or control modes is latched on every falling

edge of CLKIN and takes effect on the following

rising edge of FRAME.

Test Pattern #1:

(all channels)

HEX

BINARY

Test Pattern #1: (All channels)

A00001

0001 0000 0000 0000 0000 0001

Sign, MSB

LSB, parity

Test Pattern #2:

(Unique for each channel)

Channel HEX

BINARY

0

1000A0 0001 0000 0000 0000 0000 0001

1

000A01 0000 0000 0000 1010 0000 0001

2

20A000 0010 0000 1010 0000 0000 0000

3

0A0001 0000 1010 0000 0000 0000 0001

4

450000 0100 0101 0000 0000 0000 0000

5

005001 0000 0000 0101 0000 0000 0001

6

800500 1000 0000 0000 0101 0000 0000

7

000051 0000 0000 0000 0000 0101 0001

Sign, MSB

LSB, parity

Table 4. Test Patterns

DS109PP2

17

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