74HC3G34(2018) Просмотр технического описания (PDF) - NXP Semiconductors.
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74HC3G34 Datasheet PDF : 13 Pages
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Nexperia
74HC3G34; 74HCT3G34
Triple buffer gate
Symbol Parameter
Conditions
74HCT3G34
tpd
propagation delay nA to nY; see Figure 4
VCC = 4.5 V
tt
transition time
nY; VCC = 4.5 V; see Figure 4
CPD
power dissipation VI = GND to VCC - 1.5 V
capacitance
[1] All typical values are measured at Tamb = 25 °C.
[2] tpd is the same as tPLH and tPHL.
[3] tt is the same as tTLH and tTHL.
[4] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD x VCC2 x fi x N + Σ(CL x VCC2 x fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL x VCC2 x fo) = sum of outputs.
-40 °C to +85 °C
Min Typ[1] Max
-40 °C to +125 °C Unit
Min
Max
[2]
-
10
23
-
[3]
-
6
19
-
[4]
-
9
-
-
29 ns
25 ns
-
pF
11.1 Waveform and test circuit
VI
input
nA
GND
VOH
output
nY
VOL
VM
tPHL
VM
VM
VM
10 %
t PLH
90 %
t THL
t TLH
001aad982
Measurement points are given in Table 9.
VOL and VOH are typical voltage output levels that occur with the output load.
Figure 4. Propagation delay data input (nA) to data output (nY) and transition time output (nY)
Table 9. Measurement points
Type
74HC3G34
74HCT3G34
Input
VM
0.5 x VCC
1.3 V
Output
VM
0.5 x VCC
1.3 V
74HC_HCT3G34
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 11 June 2018
© Nexperia B.V. 2018. All rights reserved.
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