74HC3G34(2018) Просмотр технического описания (PDF) - NXP Semiconductors.

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74HC3G34
(Rev.:2018)

Triple buffer gate

NXP Semiconductors. 

Nexperia

74HC3G34; 74HCT3G34

Triple buffer gate

6.2 Pin description

Table 3. Pin description

Symbol

1A, 2A, 3A

1Y, 2Y, 3Y

GND

VCC

Pin

1, 3, 6

7, 5, 2

4

8

7 Functional description

Table 4. Function table

H = HIGH voltage level; L = LOW voltage level.

Input

nA

L

H

Description

data input

data output

ground (0 V)

supply voltage

Output

nY

L

H

8 Limiting values

Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol Parameter

Conditions

Min Max Unit

VCC

IIK

IOK

IO

ICC

IGND

Tstg

Ptot

supply voltage

input clamping current

output clamping current

output current

quiescent supply current

ground current

storage temperature

total power dissipation

VI < -0.5 V or VI > VCC + 0.5 V

VO < -0.5 V or VO > VCC + 0.5 V

VO = -0.5 V to (VCC + 0.5 V)

Tamb = -40 °C to +125 °C

-0.5

[1]

-

[1]

-

-

-

-50

-65

[2]

-

+7.0 V

±20 mA

±20 mA

±25 mA

50 mA

- mA

+150 °C

300 mW

[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

[2] For TSSOP8 package: above 55 °C the value of Ptot derates linearly with 2.5 mW/K.

For VSSOP8 package: above 110 °C the value of Ptot derates linearly with 8 mW/K.

74HC_HCT3G34

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 7 — 11 June 2018

© Nexperia B.V. 2018. All rights reserved.

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