74HC299(2016) Просмотр технического описания (PDF) - NXP Semiconductors.
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74HC299 Datasheet PDF : 20 Pages
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74HC299
8-bit universal shift register; 3-state
Rev. 4 — 26 February 2016
Product data sheet
1. General description
The 74HC299 is an 8-bit universal shift register with 3-state outputs. It contains eight
edge-triggered D-type flip-flops and the interstage logic necessary to perform
synchronous shift-right, shift-left, parallel load and hold operations. The type of operation
is determined by the mode select inputs S0 and S1. Pins I/O0 to I/O7 are flip-flop 3-state
buffer outputs which allow them to operate as data inputs in parallel load mode. The serial
outputs Q0 and Q7 are used for expansion in serial shifting of longer words. A LOW signal
on the asynchronous master reset input MR overrides the Sn and clock CP inputs and
resets the flip-flops. All other state changes are initiated by the rising edge of the clock
pulse. Inputs can change when the clock is either state, provided that the recommended
set-up and hold times are observed. A HIGH signal on the 3-state output enable inputs
OE1 or OE2 disables the 3-state buffers and the I/On outputs assume a high-impedance
OFF-state. In this condition, the shift, hold, load and reset operations can still occur. The
3-state buffers are also disabled by HIGH signals on both S0 and S1, when in preparation
for a parallel load operation. Inputs include clamp diodes. This enables the use of current
limiting resistors to interface inputs to voltages in excess of VCC.
2. Features and benefits
Input levels:
For 74HC299: CMOS level
Multiplexed inputs/outputs provide improved bit density
Four operating modes:
Shift left
Shift right
Hold (store)
Load data
Operates with output enable or at high-impedance OFF-state (Z)
3-state outputs drive bus lines directly
Cascadable for n-bit word lengths
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from 40 C to +85 C and from 40 C to +125 C
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